2010
DOI: 10.1002/adma.201001502
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Mixed Self‐Assembled Monolayer Gate Dielectrics for Continuous Threshold Voltage Control in Organic Transistors and Circuits

Abstract: Mixed alkyl/fluoroalkyl phosphonic acid self‐assembled monolayers have been prepared as ultra‐thin dielectrics in low‐voltage organic thin‐film transistors and complementary circuits. Mixed monolayers enable continuous threshold‐voltage tuning simply by adjusting the molecular mixing ratio Continuous threshold‐voltage control makes it possible to place the switching voltage of the circuits at precisely half the supply voltage, producing the maximum noise margin.

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Cited by 178 publications
(172 citation statements)
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“…The hydrophobicity of the C 8 PA surface is improved when the desorption time is increased from 25 to 210 minutes, leading to a water contact angle of 107.4  0.5 for the latter. This value is similar to the value reported for C 18 PA monolayers assembled from solutions [36]. The reduction in the leakage current density, increase in the breakdown electric field and improvement in the surface roughness confirm that dry C 8 PA monolayer provides good step coverage and offers an alternative path to alkyl phosphonic acid monolayers prepared from solution.…”
Section: Properties Of the Gate Dielectricsupporting
confidence: 87%
“…The hydrophobicity of the C 8 PA surface is improved when the desorption time is increased from 25 to 210 minutes, leading to a water contact angle of 107.4  0.5 for the latter. This value is similar to the value reported for C 18 PA monolayers assembled from solutions [36]. The reduction in the leakage current density, increase in the breakdown electric field and improvement in the surface roughness confirm that dry C 8 PA monolayer provides good step coverage and offers an alternative path to alkyl phosphonic acid monolayers prepared from solution.…”
Section: Properties Of the Gate Dielectricsupporting
confidence: 87%
“…A CMOS inverter with an optimum trip voltage and noise margin (72%) was fabricated on a flexible substrate, the highest noise margin for a CMOS circuit based on a single flexible semiconductor material achieved to date. The highest previously reported noise margin organic CMOS inverter was 80% on a rigid substrate, using both p-type (pentacene) and n-type (F 16 CuPc) semiconductors (18). However, the channel width of one of the transistors had to be 10 times larger than the other, which increases the size of the whole circuit.…”
Section: Discussionmentioning
confidence: 99%
“…This is because transistor threshold voltage determines the input voltage at which a circuit switches between two logic states (trip voltage of an inverter). When the trip voltage is half of the supply voltage, the circuit has the largest noise margin, which is a quantitative measure of the immunity of a logic circuit against noise and a figure of merit to characterize the robustness of the circuit (17,18). If threshold voltage cannot be controlled during the fabrication process, the resulting circuit might not work reliably due to the electrical noise that is always present in the system.…”
mentioning
confidence: 99%
“…Such devices present an ideal system to characterize these 2D films, as they contain only a single, chemically bound layer of semiconductor. The expected improvement of the electronic properties in mixed SAMs was only validated for short alkyl-PAs up to chain length of C 10 . Longer alkyl-PAs in the mixed SAMs led to a decrease in performance, which can be explained by closely analysing the results of the XRR measurements.…”
Section: Discussionmentioning
confidence: 99%