Modern circuit design increasingly relies on multiple clock domainsat different frequencies and with different phases-in order to achieve performance and power requirements. In this paper, we identify a special case of multiple clocking that encompasses typical design styles, and we present a theory enabling a wide range of register transformations relating to the multiple clock domains. For example, we can perform pipelining, phase abstraction, and retiming across clock domain boundaries. We believe our theory will be useful to extend current work on formal hardware design, synthesis, and verification to multiple-clock-domain systems.