Modeling and Optimization of Plasmonic Detectors for Beyond-CMOS Plasmonic Majority Logic Gates

Abstract

In this work, we report the modeling and design of a high-speed Ge-based plasmonic detector coupled with a Metal-Insulator-Metal (MIM) plasmonic majority gate. The detector is designed to distinguish between multiple output levels of the integrated majority gate. Through numerical analyses we predict the proposed plasmonic detector has an intrinsic bandwidth beyond 220GHz at an applied bias of only 100mV . An asymmetric Metal-Semiconductor-Metal (MSM) configuration of the plasmonic detector ensures a dark current of a few nA which results in high sensitivity. The high electric field generated by the electrode asymmetry enables effective separation of the photogenerated carriers resulting in high photocurrent even at few mVs of applied bias. The low capacitance of less than 1f F arising from the small detector dimensions results in a high RClimited bandwidth. Moreover, the narrow plasmonic Ge slot of the photodetector provides a short drift path and fast transit time for carriers. Unlike previously reported plasmonic detectors that use noble metals as electrodes, our proposed detector employs Al and Cu to meet CMOS compatibility requirements and thus can be a potential candidate for high-speed computational systems in industry-level applications. Additionally, the findings presented in the paper will be helpful for the future realization of an integrated plasmonic system.

Plasmonic MIM and MSM Waveguide Couplers for Plasmonic Integrated Computing System

“…1(a)), which serves as a generic example of the coupled plasmonic WGs used for communicating data from the plasmonic into the electrical domain. To illustrate the use of the studied couplers in computing-related contexts, we additionally consider a single-stage Al-SiO 2 -Al plasmonic logic gate (using the concept proposed by Dutta et al [36]) coupled to Al-Ge-Cu plasmonic detector [26] (Fig. 1(b)).…”

“…Coupling can be improved by decreasing (increasing) the width of the MIM (MSM) WG that increases (decreases) the n ef f (M IM ) (n ef f (M SM ) ) value. However, increasing w M SM negatively affects the detection bandwidth of the MSM WG [26]. Therefore, we have changed w M IM to improve the coupling.…”

“…The current in the presence of SPP signal deviates for various coupling methods depending on the amount of power being absorbed in the Ge slot. For the overlap1 coupler, dark current (I Dark ) is high because of the presence of Al on both sides of the Ge slot that reduces the SBH at the metal-semiconductor junction [26], [39]. The high I Dark makes detection of the weakest output signal of the overlap1 coupled logic gate very challenging.…”

“…For practical applications (e.g., readout purpose), the plasmonic MIM devices need to be interfaced with the CMOS circuit, which requires conversion of the plasmon signal to current/voltage. For an efficient conversion of the manipulated plasmon signal from a MIM device, a plasmonic MSM WG/detector [26] can be employed, which makes the coupler between the MIM and MSM WGs a crucial component for a highly integrated plasmonic computing system. Prior to an experimental study of the MIM and MSM WG couplers, a systematic theoretical study focusing on the quantitative comparison of the couplers is crucial as the cost of any experiment is getting extremely high with advanced scaled technology nodes making a wide space design exploration unaffordable.…”

High Efficiency Multi-Functional All-Optical Logic Gates Based on Mim Plasmonic Waveguide Structure With the Kerr-Type Nonlinear Nano-Ring Resonators

“…Abbas and Abdulnabi [40] proposed plasmonic reversible logic gates. Noor et al [41] proposed the modeling and optimization of plasmonic detectors for beyond-CMOS plasmonic majority logic gates. Fakhruldeen and Mansour [42] proposed the design and simulation of plasmonic NOT gate based on insulator-metal-insulator (IMI) waveguides.…”