Modeling of Energy Dissipation in RLC Current-Mode Signaling

An efficient and novel FDTD method based performance investigation in high-speed current-mode signaling SWCNT bundle interconnect

“…In CMS scheme, low impedance termination is achieved by using specialized current mode receiver circuits [28,29,32]. It is equivalently modeled by parallel combination of load resistance (R L ) and C L [31,33,34]. The value of a in figure 2 is '0' for copper leading to zero R 0 lump resistance.…”

“…The traditional VMS scheme has full rail-to-rail swing whereas remarkable CMS scheme has reduced voltage swing over the interconnects [28,29]. CMS scheme possesses peculiar properties as high speed [28,30], high bandwidth [28], superior signal integrity [31] and high immune to electrostatic discharge (ESD) induced damage of MOS transistors [29]. The reduced voltage swing in CMS scheme is obtained by using specialized low input impedance current-mode receiver circuits [28,29,31,32].…”

“…CMS scheme possesses peculiar properties as high speed [28,30], high bandwidth [28], superior signal integrity [31] and high immune to electrostatic discharge (ESD) induced damage of MOS transistors [29]. The reduced voltage swing in CMS scheme is obtained by using specialized low input impedance current-mode receiver circuits [28,29,31,32]. Until now, nearly all of the researches were focused on voltage mode signaling (VMS) scheme for SWCNT bundle interconnect [10,[18][19][20][21][22][23][24][25][26][27].…”

“…Until now, nearly all of the researches were focused on voltage mode signaling (VMS) scheme for SWCNT bundle interconnect [10,[18][19][20][21][22][23][24][25][26][27]. In [28,[31][32][33][34], the performance of copper interconnect using CMS scheme has been explored. It is investigated that CMS copper interconnect possesses high speed and bandwidth as compared to VMS copper interconnect.…”

Design and analysis of efficient multilevel receiver for current mode interconnect system

“…Moreover, the repeaters need to be properly sized for attaining optimal performance [6]. As opposed to voltage mode techniques, current mode signaling is found to be effective in reducing delay, power, bandwidth and for higher throughputs [7][8][9][10]. In current mode signaling, voltage swing over the interconnect line is reduced so that there is lesser delay in charging and discharging parasitic capacitance of the interconnects as compared to voltage mode signaling.…”