Modeling of IC power supply and I/O ports from measurements

Abstract

This paper addresses the generation of behavioral models of digital ICs for signal and power integrity simulations. The proposed models are obtained by external port measurements and by the combined application of specialized state-of-the-art modeling techniques. The proposed approach is demonstrated on the I/O buffers and the core power supply ports of a commercial 90nm flash memory.

Behavioral Modeling of IC Core Power-Delivery Networks From Measured Data

“…The indirect measurement of the switching current via the voltage drop on the series resistor was carried out with a LeCroy WavePro 7300A scope (3GHz bandwidth, 10GS/s). Preliminary measurement results can be found in [8].…”

“…Experience teaches us that the power supply current drawn by a digital memory is a superposition of a fast switching activity of the internal gates and of a slower current absorption corresponding to the enable/disable function of internal macroblocks [8]. Therefore, the signal a(t) of Fig.…”

Validation by Measurements of an IC Modeling Approach for SiP Applications

“…Thus, in this analysis the output operation mode of the I/O buffer is analyzed and simulated. Unfortunately, in a general die no access is given to the voltage signal sent by the IC core circuitry to the input of [16], [21]. Even though any of the already published I/O buffer behavioral models could have been considered in the modeling approach here described (being directly applied into the simulation environment), the I/O buffer models that were used in this work were the SPICE netlists of the I/O buffer circuits which were available for the memory ICs under test.…”

“…The transient current is obtained via the indirect measurement of the voltage drop over a 1Ω resistor that is mounted in series with the ground pad of the power rail. This method, following the standard for the measurement of the conducted emission of ICs in the range from dc to 1GHz [22] has been selected among a limited number of possible alternative techniques, since it is simple to implement and has been proven to demonstrate accurate results in practical applications [21], [23] [24]. As an example, Fig.…”

“…As referred in Section II.B, since the SPICE netlists of the I/O buffer circuits were available for both test-cases, these were used to model the I/O buffer behavior. However, behavioral models could have been also considered, whose extraction procedure can also be based on laboratory measurements (see, for instance, [14], [21]).…”