In this paper, we investigate the performance degradation of nMOS transistors due to hot-carrier effect and drain power mismatch. The DC and RF characteristics, such as drain current, threshold voltage, transconductance, power gain, etc., are affected under some kinds of stresses. During the power contour measurement by a load-pull system, the transistors experience the reflection power from load for the most part of measurement time. This mainly results from mismatching impedance and will make drain current degenerated. The degree of the degeneration depends on the quantity of load mismatch and device layout pattern of power cells. From the measurement results, it is found that the degradation can be mitigated by a dispersive layout structure. From the experimental results, the layout of power cells can be designed properly to mitigate the degeneration of power performances and improve the reliability of circuits when designing CMOS RF power amplifiers. The power performances of this paper were measured at 5.2 GHz.