Modelling for triple gate spin‐FET and design of triple gate spin‐FET‐based binary adder

Abstract

In this study, an InAs channel-based triple gate spin-field effect transistor (FET) model is proposed. The proposed triple-gate spin-FET offers a high density of integration, consumes low power and offers very high switching speed. By incorporating the suitable parameters like channel length, spin diffusion length, channel resistance and junction polarisation, the modelled triple gate spin-FET is then used to implement 3-input XOR, 3-input XNOR and majority gate functions. The designs of 3-input XOR and majority gates were achieved keeping in view that the sum operation of a 1-bit full adder is obtained through XOR gate and the carry operation of 1-bit full adder is obtained through majority gate. Therefore, for designing a 1-bit full adder, only two spin-FETs will be required which signifies the compact nature of the design. In addition, a 2-bit ripple adder is designed with cascading two 1-bit full-adders. Finally, a comparative analysis of the proposed gates and 1-bit full adder with the reported work and conventional CMOS design was carried out in terms of employed number of devices, power consumption and speed. The analysis shows that proposed gates/adder offer better performance than the reported work and conventional CMOS designs.

Review—Silicene: From Material to Device Applications

“…Spintronics is a novel field of electronics which uses spin in addition to the charge of the electron to represent the binary information. [154][155][156] Both two terminal (Magnetic Tunnel Junction) and three terminal (Spin-FET) spin based devices have been fabricated. Spintronics is considered to be one of the future technologies for low power electronics.…”

Negative differential resistance in gate all-around spin field effect transistors

“…Spin field effect transistor (Spin-FET) is believed to be a better device than conventional semiconductor field effect transistor devices due to its exceptional properties, such as control of conductivity using spin degree of freedom [3]. Owing to less energy required for control of spin, Spin-FET is well suited for low-power applications, and hence, can resolve the power issues of conventional transistors [4]. Spin-FET was proposed by S. Datta and B. Das in the year 1990 and has appeared as one among the mostly researched device for various applications [5].…”