Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems and Computers, 2005.
DOI: 10.1109/acssc.2005.1600044
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Modelling Heterogeneous DSP-FPGA Based System Partitioning with Extensions to the Spinach Simulation Environment

Abstract: Abstract-In this paper we present system-on-a-chip extensions to the Spinach simulation environment for rapidly prototyping heterogeneous DSP/FPGA based architectures, specifically in the embedded domain. This infrastructure has been successfully used to model systems varying from multiprocessor gigabit ethernet controllers to Texas Instruments C6x series DSP based systems with tightly coupled FPGA based coprocessors for computational offloading. As an illustrative example of this toolsets functionality, we in… Show more

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Cited by 2 publications
(3 citation statements)
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“…In evaluating the performance of the hardware/software partitioned workloads, the Spinach simulation infrastructure for DSPs and embedded systems is used [2], [14]. The Spinach simulation infrastructure is a reconfigurable simulator framework for rapidly prototyping heterogeneous systems.…”
Section: Methodsmentioning
confidence: 99%
“…In evaluating the performance of the hardware/software partitioned workloads, the Spinach simulation infrastructure for DSPs and embedded systems is used [2], [14]. The Spinach simulation infrastructure is a reconfigurable simulator framework for rapidly prototyping heterogeneous systems.…”
Section: Methodsmentioning
confidence: 99%
“…Other peripherals include program loaders, Texas Instruments Code Composer Studio and MIPS gcc compiler support, program trace analyzers, memory system analyzers, etc. A fullly detailed description of the included simulator modules and peripherals can be found in [2].…”
Section: Soc Simulation Infrastructurementioning
confidence: 99%
“…In order to prototype and evaluate heterogeneous DSP/FPGA based architectures, a custom simulation infrastructure is used for heterogeneous DSP/FPGA system-on-a-chip architectures [2], [3]. In using this simulation infrastructure, the user is allowed to rapidly prototype a heterogeneous DSP/FPGA based system as well as on-chip interconnects, DMA engines and peripherals in a bit-true, cycle-accurate manner.…”
Section: Soc Simulation Infrastructurementioning
confidence: 99%