Modified carrier PWM strategies for multilevel inverters

Thamizharasan, S.; Baskaran, J.; Ramkumar, S.; Ali, Sardar

doi:10.1109/iccpeic.2013.6778497

2013 International Conference on Computation of Power, Energy, Information and Communication (ICCPEIC) 2013

DOI: 10.1109/iccpeic.2013.6778497

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Modified carrier PWM strategies for multilevel inverters

S. Thamizharasan¹,

J. Baskaran²,

S. Ramkumar³

et al.

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Cited by 2 publications

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“…This is useful in order to reduce the thermal losses in power semiconductor switches compared to two level or three level VSI, which uses high switching frequency. [4][5][6][7] In multilevel inverters, high quality output voltage can be realized by using medium voltage switching devices and because of this reason, multilevel converters find wide applications in the area of industrial drives. Several modulation and filtering techniques for multilevel converters are proposed 8 in order to provide a quality output voltage and to meet the power quality standards, when these converters are utilized in medium to high power applications in stand-alone and grid connected modes.…”

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confidence: 99%

Modified Selective Harmonics Mitigation PWM for a Switched Diode Multilevel Inverter

Ponrekha

Ali

Lakshmanan

et al. 2021

ECS J. Solid State Sci. Technol.

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A modified selective harmonic mitigation (SHM) technique for multilevel inverters considering the RMS output voltage magnitude is presented. The harmonic contents in the output voltage of these inverters must satisfy the specified grid code requirement standards. In conventional SHM techniques, the firing angles of the multilevel inverters have been derived by taking into account grid code harmonic reduction standards. When the multi-level inverters are driven with these firing pulses generated, it results in reduction of the magnitude of the inverter output voltage. In order to overcome this issue of output voltage reduction, the modified SHM optimization problem includes another constraint on the RMS output voltage limits, which results in different set of firing angles. This facilitates the use of firing angles, which takes into account the grid code standards of harmonic mitigation without compromising the value of the RMS output voltage of the inverters. The proposal has been simulated and validated in MATLAB Simulink and the experimental results are obtained for a single-phase seven level inverter with Silicon made semiconductor switches. By using the proposed method, output voltage THD (upto 40 th harmonics were considered) of 5.9% was obtained, which is well below the harmonic standards specified by EN 50160.

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confidence: 99%

Modified Selective Harmonics Mitigation PWM for a Switched Diode Multilevel Inverter

Ponrekha

Ali

Lakshmanan

et al. 2021

ECS J. Solid State Sci. Technol.

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Cascaded H–Bridge Multilevel Inverter: Review of Topologies and Pulse Width Modulation

Hameed,

AL-Mhana

2024

Tikrit j. eng. sci.

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Multilevel inverters (MLIs) have become more popular for medium-voltage and high-power applications. The cascaded H-bridge multilevel inverter (CHBMLI) is one of the three most popular topologies of MLIs. It was more reliable due to its fewer components per level. The number of possible output voltage levels is more than twice the number of DC sources, the most suitable topology for integration with renewable energy sources, easy to design, and has good performance with modularity. The main disadvantage of CHBMLI is the need for separate DC sources for each H-bridge. However, this can be considered as an advantage to be employed in renewable energy applications. This paper provides a review of CHBMLI topologies and pulse width modulation (PWM) techniques, including fundamental and high switching frequency techniques, such as selective harmonic elimination (SHE), space vector modulation (SVM), nearest level modulation (NLM), and Carrier-Based PWM.

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Modified carrier PWM strategies for multilevel inverters

Cited by 2 publications

References 16 publications

Modified Selective Harmonics Mitigation PWM for a Switched Diode Multilevel Inverter

Modified Selective Harmonics Mitigation PWM for a Switched Diode Multilevel Inverter

Cascaded H–Bridge Multilevel Inverter: Review of Topologies and Pulse Width Modulation

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