Modified CMOS Cherry-Hooper amplifiers with source follower feedback in 0.35μm technology

Holdenried, C.D.; Lynch, Michael W.; Haslett, J.W.

doi:10.1109/esscirc.2003.1257195

Cited by 24 publications

(11 citation statements)

References 2 publications

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“…For the sake of overwhelming the suppressed gain, a modification with source follow feedback (M 5 , M 6 ) and split resistors (R s1 , R s2 ) is necessary [9]. This study uses the modified Cherry-Hooper topology in the limiting amplifier stage as depicted in Fig.…”

Section: Circuit Descriptionmentioning

confidence: 99%

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A linear-in-dB radio-frequency power detector

Hsu

Lai

et al. 2011

2011 IEEE MTT-S International Microwave Symposium

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An integrated circuit of radio-frequency power detection by a 0.18ǐm CMOS process with the output voltage linearly proportional to the input power in decibel is presented. The target dynamic range of this radio-frequency power detector design is 40 dB with the log-error being within ±1dB. Whatever the point of view is on dynamic range or logarithmic error, the working range is from DC to 8GHz. The power consumption is less than 70mW. It behaves with wider applicable frequency range and takes lower power consumption as compared to others.Index Terms -CMOS, Cherry-Hooper amplifier, power detector, radar receiver, successive detection logarithmic amplifier, unbalanced source-coupled pairs.

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Section: Circuit Descriptionmentioning

confidence: 99%

“…A full-wave rectifier consists of two identical unbalanced source-coupled pairs (M 11 -M 12 and M 13 -M 14 ) connected in parallel [9]. They are cross-coupled on input stages and parallel connected on the output stages.…”

Section: Circuit Descriptionmentioning

confidence: 99%

A linear-in-dB radio-frequency power detector

Hsu

Lai

et al. 2011

2011 IEEE MTT-S International Microwave Symposium

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“…Cherry-Hooper amplifiers with source follower feedback are added every two filter taps [7]. The clock signal is reshaped with sharp edges after the broadband Cherry-Hooper amplifiers, which improves the clock jitter effectively.…”

Section: Clock Tree Distributionmentioning

confidence: 99%

A 17-tap 3.5 Gbps finite impulse response pulse shaping filter for 60 GHz transmitter with QPSK modulation

Zhao

Hellfeld

Wolf

et al. 2010

2010 Proceedings of ESSCIRC

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A 17-tap 3.5 Gbps finite impulse response (FIR) pulse shaping filter for 60 GHz transmitters with quadrature phaseshift keying (QPSK) modulation is presented. Measurement results show that an attenuation of 19 dB at 2.2 GHz is achieved with cutoff frequency of 1.76 GHz，which enable the 60 GHz transmitter to comply with the stringent spectrum mask requirement. No digital-to-analog converters (DACs) are needed in the proposed approach performed in the analog baseband. The dc power of 3.3 V × 300 mA (55 mA without buffers) is competitive compared to conventional DACs not providing filtering functionality. Implemented in a 0.25 μm SiGe HBT technology, the fully integrated circuit consumes an area of 1.6mm 2 .

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“…Furthermore, active inductors are unfavorable for noise performance. The post-amplifier in this work [10] is based on a cascade of modified CMOS Cherry-Hooper amplifiers [11]. No source followers are placed between the cascaded stages as they only degrade the gain performance.…”

Section: Introductionmentioning

confidence: 99%

A High-Speed 850-nm Optical Receiver Front-End in 0.18-<tex>$muhbox m$</tex>CMOS

Hermans

Steyaert

2006

IEEE J. Solid-State Circuits

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A high-speed optical interface circuit for 850-nm optical communication is presented. Photodetector, transimpedance amplifier (TIA), and post-amplifier are integrated in a standard 0.18-m 1.8-V CMOS technology. To eliminate the slow substrate carriers, a differential n-well diode topology is used. Device simulations clarify the speed advantage of the proposed diode topology compared to other topologies, but also demonstrate the speed-responsivity tradeoff. Due to the lower responsivity, a very sensitive transimpedance amplifier is needed. At 500 Mb/s, an input power of 8 dBm is sufficient to have a bit error rate of 3 10 10. Next, the design of a broadband post-amplifier is discussed. The small-signal frequency dependent gain of the traditional and modified Cherry-Hooper stage is analyzed. To achieve broadband operation in the output buffer, so-called " doublers" are used. For a differential 10 mV pp 2 31 1 pseudo random bit sequence, a bit error rate of 5 10 12 at 3.5 Gb/s has been measured. At lower bit-rates, the bit error rate is even lower: a 1-Gb/s 10-mV pp input signal results in a bit error rate of 7 10 14. The TIA consumes 17 mW, while the post-amplifier circuit consumes 34 mW.

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Modified CMOS Cherry-Hooper amplifiers with source follower feedback in 0.35μm technology

Cited by 24 publications

References 2 publications

A linear-in-dB radio-frequency power detector

A linear-in-dB radio-frequency power detector

A 17-tap 3.5 Gbps finite impulse response pulse shaping filter for 60 GHz transmitter with QPSK modulation

A High-Speed 850-nm Optical Receiver Front-End in 0.18-<tex>$muhbox m$</tex>CMOS

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