It is known that high carrier recombination at p‐n junction interface and low carrier separation ability (CSA) are two main problems resulting in low power conversion efficiency (PCE) of Cu2ZnSn(S,Se)4(CZTSSe) solar cell. To resolve these problems, one CZTSSe solar cell are prepared through substituting B‐doped CdS for CdS in solar cell with conventional structure of Ag/ITO/ZnO/CdS/CZTSSe/Mo/SLG and annealing B‐doped CdS/CZTSSe/Mo/SLG prior to deposition of ZnO, ITO and Ag electrode. By optimizing B doping content in the CdS and annealing temperature and time of the B‐doped CdS/CZTSSe, lattice mismatch between CdS and CZTSSe is decreased and width of depletion region is increased, leading to reduce in interfacial recombination, enhancement in carrier separation ability and intensity of incident light passing through the B‐doped CdS, and so increase in PCE from 7.89% of CZTSSe solar cell using CdS as buffer layer to 10.62%. A mechanism of the increment of the PCE induced by the B‐doping and annealing is suggested. This work proposes a method of increasing PCE of CZTSSe solar cell and advances a deeper understanding of the mechanisms behind various parameters in CZTSSe solar cells through theoretical analysis and calculations.This article is protected by copyright. All rights reserved.