Moisture Uptake Impact on Damage Layer of Porous Low-k Film in 80nm-Pitched Cu Interconnects

Abstract

Impacts of the moisture uptake into the damage layer of porous SiOCH low-k film on line capacitance and leakage current were investigated in the 80nm-pitch triple layer interconnect structure. The damage layer thickness was controlled from zero to 8nm by the RIE, wet process and Cu surface treatment. The damage layer thickness is defined by TEM-EELS analysis. The line capacitance and leakage current were increased by moisture uptake. The dielectric constant of damage layer including moisture was estimated 7.6 by the capacitance simulation. The moisture control of the damage layer in porous SiOCH low-k film is very important to reduce the line capacitance and improve the line leakage current as well as damage layer elimination.

Review of methods for the mitigation of plasma‐induced damage to low‐dielectric‐constant interlayer dielectrics used for semiconductor logic device interconnects

“…The introduction of the methyl group reduces the density of silicon‐oxide‐skeletonized films . When Si‐O‐Si ladders are terminated by a methyl group, the dielectric constant decreases; however, the mechanical strength decreases significantly.…”

Comprehensive Study of the Chemical, Physical, and Structural Evolution of Molecular Layer Deposited Alucone Films during Thermal Processing

“…In addition, the moisture uptake of alucones can significantly modify film chemistry . This moisture uptake has deleterious effects on dielectric and mechanical reliability of low- k films causing early breakdown. − Here, we report the deposition and characterization of MLD alucone films and examine the role of post-deposition annealing and the effects of short wavelength UV light irradiation on the physical, chemical, and electrical properties of the films. We addressed the stability issue of the alucone films by depositing a 1 nm alumina cap as a barrier to prevent water uptake and film degradation.…”

Effects of Low-k Stack Structure on Performance of Complementary Metal Oxide Semiconductor Devices and Chip Package Interaction Failure

“…The damaged porous low-k SiOCH film degrades the interconnects performances such as C int , electro-migration (EM), stress induced voiding (SiV) and time dependent dielectric breakdown (TDDB) due to mainly moisture absorption into hydrophilic damaged layer. [6][7][8][9][10] Moreover, the porous SiOCH film has low modulus and weak adhesive strength with SiCN cap film, degrading reliability in chip packaging interaction (CPI). [11][12][13][14][15][16] In order to prevent such degradations of interconnect performances, SiO 2 hard mask (HM), etch stop layer (ES), and the hybrid structure with porous low-k materials as the IMD films and rigid low-k materials as the ILD films have been investigated.…”

“…[11][12][13][14][15][16] In order to prevent such degradations of interconnect performances, SiO 2 hard mask (HM), etch stop layer (ES), and the hybrid structure with porous low-k materials as the IMD films and rigid low-k materials as the ILD films have been investigated. [6][7][8][9][10][17][18][19][20][21][22][23] However, the introduction of such higher-k materials causes the increase of effective k-value (k eff ), which is derived from comparison between measured C int and calculated C int by assuming the uniform k eff material for all dielectrics such as IMD, ILD, hard mask (HM), and cap layer. So, the k eff reduction with maintaining the reliabilities is a key to introduce porous low-k SiOCH materials into IMD and ILD.…”