Molecular beam epitaxy of GaAs/AlGaAs superlattice heterostructures on nonplanar substrates

Kapon, E.; Tamargo, M. C.; Hwang, D. M.

doi:10.1063/1.98196

Cited by 219 publications

(38 citation statements)

References 8 publications

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“…On the other hand, in the III-V semiconductor technology, wet chemical etching in various acid solutions [7] is widely used in various processing steps of device fabrication owing to its low damage nature as compared with the dry etching. Quantum nanostructure fabrication by selective MBE or MOVPE growth on pre-patterned substrates [8,9] also requires highly controllable wet chemical etching for pattern fabrication.…”

Section: Wet Etching and Behavior Of N-inp Anodesmentioning

confidence: 99%

Electrochemical processes for formation, processing and gate control of III–V semiconductor nanostructures

Hasegawa

Sato

2005

Electrochimica Acta

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This paper reviews recent efforts by authors' group to utilize electrochemical processes for formation, processing and gate control of III-V semiconductor nanostructures. Topics include precise photo anodic and pulsed anodic etching of InP, formation of arrays of <001>-oriented straight nanopores in n-type (001) InP by anodization and their possible applications, and macroscopic and nanometer-scale metal contact formation on GaAs, InP and GaN by a pulsed in-situ electrochemical process, which remarkably reduces Fermi level pinning. All the results indicate that electrochemical processes can achieve unique and important results which the conventional semiconductor technology cannot realize, anticipating their increased importance in future semiconductor nanotechnology and nanoelectronics. Key words:III-V semiconductors, anodic etching, nanopore, electrodeposition, Schottky barrier 1.IntroductionIt is widely recognized that artificial semiconductor nanostructures such as quantum wires (QWRs) and quantum dots(QDs) give rise to new rich functionalities to materials. They produce new quantum state spectra with novel state transitions and linear and non-linear quantum transport phenomena, and open up opportunities for novel quantum devices which control quantum-mechanical behavior of electrons and photons in various sophisticated ways.The standard approach for semiconductor nanostructure formation is to use fine crystal growth techniques such as molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE). To fabricate devices, various standard etching and metal deposition techniques are used together with standard lithography techniques. However, the electrochemical approaches, if it attains sufficiently high controllability at the nanometerscale, seems to be highly useful for nanostructure formation and processing. The expected advantages include: (1) process simplicity and versatility, (2) capability of self-organization, (3) low processing temperature, (4) low process induced damage, (5) precise electrical control and (6) low processing costs.Some well known examples are porous Si formation [1,2] and use of anodized alumina as nanostructure templates for formation of carbon nanotubes [3].The purpose of this paper is to review recent attempts by the authors' group at RCIQE, Hokkaido University, that have been carried out in order to investigate feasibility of utilizing electrochemical processes for nanometer-scale processing and nanostructure formation in III-V semiconductors. Topics discussed in this paper include controlled (1) anodic etching of InP,

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Section: Wet Etching and Behavior Of N-inp Anodesmentioning

confidence: 99%

Electrochemical processes for formation, processing and gate control of III–V semiconductor nanostructures

Hasegawa

Sato

2005

Electrochimica Acta

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“…The expected advantage of this approach with respect to conventional lithography is the possibility of including clusters of very small dimensions and uniform size distribution as well as reducing the production costs. It constitutes a self-organizing strategy to the growth of low-dimensional structures similar in spirit to the growth of porous silicon [3] or to growth on high index planes [4].…”

mentioning

confidence: 99%

Band-Gap Engineering by III-V Infill in Sodalite

1996

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“…To this end, selective area epitaxy has considerable prospects. [11][12][13][14][15] Among the procedures for spatially confining dots, the "top-down" approach is the most used. In this case, dots freely self-aggregate on the surface while the definition of the nanomesas or holes is carried out after growth.…”

Section: Single Quantum Dot Emission By Nanoscale Selective Growth Ofmentioning

confidence: 99%

Single quantum dot emission by nanoscale selective growth of InAs on GaAs: A bottom-up approach

Patella

Arciprete

Placidi

et al. 2008

Applied Physics Letters

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We report on single dot microphotoluminescence (mu PL) emission at low temperature and low power from InAs dots grown by molecular beam epitaxy in nanoscale holes of a SiO2 mask deposited on GaAs(001). By comparing atomic force microscopy measurements with mu PL data, we show that the dot sizes inside the nanoholes are smaller than those of the dots nucleated on the extended GaAs surface. PL of dots spans a wide energy range depending on their size and on the thickness and composition of the InGaAs capping layer. Time-resolved PL experiments demonstrate a negligible loss of radiative recombination efficiency, proving highly effective in the site-controlled dot nucleation

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Molecular beam epitaxy of GaAs/AlGaAs superlattice heterostructures on nonplanar substrates

Cited by 219 publications

References 8 publications

Electrochemical processes for formation, processing and gate control of III–V semiconductor nanostructures

Electrochemical processes for formation, processing and gate control of III–V semiconductor nanostructures

Band-Gap Engineering by III-V Infill in Sodalite

Single quantum dot emission by nanoscale selective growth of InAs on GaAs: A bottom-up approach

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