Monolithic Capacitive DC-DC Converter With Single Boundary–Multiphase Control and Voltage Domain Stacking in 90 nm CMOS

Breussegem, T.M. Van; Steyaert, Michiel

doi:10.1109/jssc.2011.2144350

Cited by 85 publications

(40 citation statements)

References 22 publications

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“…Table. 1 compares this work to prior art SC converters. The 70% peak efficiency of this design is comparable to the efficiencies in [3] and [5], but for a higher 4:1 conversion ratio. …”

Section: Test Chip Summarymentioning

confidence: 55%

“…In the other phase, energy stored on the capacitor during the previous phase flows to the load. The power switches operate with stacked voltage domains similar to [3] and [6]. Taking the first-stage as an example, switches driven by Φ S1_1H and Φ S1_2H operate in the high voltage domain (between V INT and V BAT ) while switches driven by Φ S1_1L and Φ S1_2L operate in the low voltage domain (between ground and V INT ).…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A fully integrated battery-connected switched-capacitor 4:1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling

Tong

Zhang

Kim

et al. 2013

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference

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“…Table. 1 compares this work to prior art SC converters. The 70% peak efficiency of this design is comparable to the efficiencies in [3] and [5], but for a higher 4:1 conversion ratio. …”

Section: Test Chip Summarymentioning

confidence: 55%

Section: Introductionmentioning

confidence: 99%

A fully integrated battery-connected switched-capacitor 4:1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling

Tong

Zhang

Kim

et al. 2013

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference

View full text Add to dashboard Cite

“…However obtaining stability and good transient response over varying load conditions using such a control method is difficult. A nonlinear control can provide superior results; hence we have used a hysteretic feedback scheme with lower and upper bounds to control the regulation (Figure 7) [15]. However our control circuit is different from traditional hysteretic control and the difference comes from the stacked loads as opposed to conventional parallel loads.…”

Section: Open-loop Versus Closed-loopmentioning

confidence: 99%

“…By adding an edge-triggered latch we make sure that only rising edges are associated with a charge transfer [15]. If there were no latches, then the falling edge, which appears because of the clocked comparator and not as a trigger for boundary crossing, will cause an unwanted charge transfer.…”

Section: State Of O/pmentioning

confidence: 99%

Exploration of Charge Recycling DC-DC Conversion Using a Switched Capacitor Regulator

Mazumdar

Stan

2013

JLPEA

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Abstract:The increasing popularity of DVFS (dynamic voltage frequency scaling) schemes for portable low power applications demands highly efficient on-chip DC-DC converters. The primary aim of this work is to enable increased efficiency of on-chip DC-DC conversion for near-threshold operation of multicore chips. The idea is to supply nominal (high) off-chip voltage to the cores which are then "voltage-stacked" to generate the near-threshold (low) voltages based on Kirchhoff's voltage law through charge recycling. However, the effectiveness of this implicit down-conversion is affected by the current imbalance among the cores. The paper presents a design methodology and optimization strategy for highly efficient charge recycling on-chip regulation using a push-pull switched capacitor (SC) circuit. A dual-boundary hysteretic feedback control circuit has been designed for stacked loads. A stacked-voltage domain with its self-regulation capability combined with a SC converter has shown average efficiency of 78%-93% for 2:1 down-conversion with ILoad (max) of 200 mA and workload imbalance varying from 0-100%.

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“…Since on-chip capacitors have a significantly higher quality factor, higher energy density, and a lower cost than on-chip inductors in the standard complementary metal-oxide-semiconductor (CMOS) process, switched-capacitor (SC)-based on-chip DC-DC converters have been receiving increased attention from both academia and industry [1][2][3][4][5].…”

Section: Introductionmentioning

confidence: 99%

Fully Integrated on-Chip Switched DC–DC Converter for Battery-Powered Mixed-Signal SoCs

Jeon

Kim

2017

Symmetry

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This paper presents a fully integrated on-chip switched-capacitor (SC) DC-DC converter that supports a programmable regulated power supply ranging from 2.6 to 3.2 V out of a 5 V input supply. The proposed 4-to-3 step-down topology utilizes two conventional 2-to-1 step-down topologies; each of them (2-to-1_up and 2-to-1_dw) has a different flying capacitance to maximize the load current driving capability while minimizing the bottom-plate capacitance loss. The control circuits use a low power supply provided by a small internal low-drop output (LDO) connected to the internal load voltage (V L_dw ) from the 2-to-1_dw, and low swing level-shifted gate-driving signals are generated using the internal load voltage (V L_dw ). Therefore, the proposed implementation reduces control circuit and switching power consumptions. The programmable power supply voltage is regulated by means of a pulse frequency modulation (PFM) technique with the compensated two-stage operational transconductance amplifier (OTA) and the current-starved voltage controlled oscillator (VCO) to maintain high efficiency over a wide range of load currents. The proposed on-chip SC DC-DC converter is designed and simulated using high-voltage 0.35 µm bipolar, complementary metal-oxide-semiconductor (CMOS) and DMOS (BCDMOS) technology. It achieves a peak efficiency of 74% when delivering an 8 mA load current at a 3.2 V supply voltage level, and it provides a maximum output power of 48 mW (I L = 15 mA at V L_up = 3.2 V) at 70.5% efficiency. The proposed on-chip SC voltage regulator shows better efficiency than the ideal linear regulator over a wide range of output power, from 2.6 mW to 48 mW. The 18-phase interleaving technique enables the worst-case output voltage ripple to be less than 5.77% of the load voltage.

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Monolithic Capacitive DC-DC Converter With Single Boundary–Multiphase Control and Voltage Domain Stacking in 90 nm CMOS

Cited by 85 publications

References 22 publications

A fully integrated battery-connected switched-capacitor 4:1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling

A fully integrated battery-connected switched-capacitor 4:1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling

Exploration of Charge Recycling DC-DC Conversion Using a Switched Capacitor Regulator

Fully Integrated on-Chip Switched DC–DC Converter for Battery-Powered Mixed-Signal SoCs

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