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A gearbox-type capacitive DC/DC converter is presented with an enhanced switch-and capacitor-array. The switch overhead is reduced significantly with respect to a conventional implementation. The presented topologies exhibit a lower swing on the intermediate capacitor nodes so that power loss due to the parasitic capacitances on these nodes is reduced drastically.Introduction: Each capacitive DC/DC converter topology has a dedicated voltage conversion ratio (VCR) for which it can operate in an efficient way. Gearbox-type capacitive DC/DC converters are converters comprising multiple topologies in order to extend the high efficiency of a converter over a broader output voltage range. By reconfiguring the converter during operation the output voltage range of such a converter is extended [1]. When selecting topologies for building a gearbox, we suggest three metrics: the parasitic swing metric (PS), the output impedance metric (OI) and the switch overhead metric (SO).

Contemporary models fail to include the influence of the output buffer capacitor size on the performance of capacitive DC-DC converters. This letter examines the relevance of this dependency and shows how to adapt existing models in order to include it. The improved model is verified mathematically for down-converters, by means of Spice simulations and based on measurements of silicon integrated prototypes. Measurements demonstrate an accuracy improvement of up to 30 % compared with the conventional model.