Monolithic integration of silicon CMOS and GaN transistors in a current mirror circuit

Abstract

GaN high electron mobility transistors (HEMTs) were monolithically integrated with silicon CMOS to create a functional current mirror circuit. The integrated circuit was fabricated on 100 mm diameter modified silicon-on-insulator (SOI) wafers incorporating a resistive (111) silicon handle substrate and a lightly doped (100) silicon device layer. In a CMOS-first process, the CMOS was fabricated using the (100) device layer. Subsequently GaN was grown by plasma molecular beam epitaxy in windows on the (111) handle substrate surface without wire growth despite using gallium-rich growth conditions. Transmission lines fabricated on the GaN buffer/SOI wafer exhibited a microwave loss of less than 0.2 dB/mm up to 35 GHz. Direct current measurements on GaN HEMTs yielded a current density of 1.0 A/mm and transconductance of 270 mS/mm. At 10 GHz and a drain bias of 28 V, 1.25 mm long transistors demonstrated a small signal gain of 10.7 dB and a maximum power added efficiency of 53% with a concomitant power of 5.6 W. The silicon and GaN transistors were interconnected to form high yield test interconnect daisy chains and a monolithic current mirror circuit. The CMOS output drain current controlled the GaN transistor quiescent current and consequently the microwave gain.

Record Combination of Power-Gain Cut-Off Frequency and Three-Terminal Breakdown Voltage for GaN-on-Silicon Devices

“…Recent improvements in the growth of GaN material on large silicon substrates (GaNon-Si) 4) provide a low-cost solution together with great potential for monolithic integration of high-performance GaN-based devices with Si-based mature technology such as CMOS, for instance. 5,6) Even though impressive performances have been established on both Si and SiC substrates, [7][8][9] highly scaled GaN devices generally suffer from a relatively low breakdown voltage compared with the inherent material properties. Moreover, other issues such as trapping effects become more pronounced with reduced device dimensions.…”

(Invited) Heterogeneous Integration of III-V Devices and Si CMOS on a Silicon Substrate

“…Details of the SOLES have been previously published (2)(3)(4). For GaN based devices, the "engineered" silicon substrate is a modified SOI wafer (5,6), in which the Si <100> handle substrate is replaced with a Si<111> substrate Figure 2 …”

Threading dislocation movement in AlGaN/GaN-on-Si high electron mobility transistors under high temperature reverse bias stressing

“…There is strong interest in monolithic integration of AlGaN/GaN high electron mobility transistors (HEMTs) with Si-complementary metal-oxide semiconductor (CMOS) 1 circuits. Also, the use of Si substrates for fabrication of GaN-based HEMTs allows less expensive large scale production and also opens up many new applications.…”