MOOSE: A Physically Based Compact DC Model of SOI LDMOSFETs for Analogue Circuit Simulation

Abstract

Abstract-In this paper, we present a compact model for silicon-on-insulator (SOI) laterally double diffused (LD) MOSFETs. The model is complete insofar as it uses no subcircuits, and is intended to predict device operation in all regions of bias. The device current is described by two main equations handling the MOS channel and the drift region, both of which are smooth and continuous in all operating regimes. Attention is also given to the modeling of inversion at the back oxide to ensure correct behavior is predicted for a source follower in power control applications ("high side operation"). A surface-potential-based formulation is used for the inversion/accumulation channel giving smooth transitions between different regions of operation, and care has been taken to ensure all expressions are smooth and infinitely differentiable to achieve the best possible convergence performance. Self (and coupled) heating effects exert a major influence over the behavior of power SOI devices, and these issues are incorporated in the model core in a consistent fashion.The model has been installed in a commercial SPICE-type circuit simulator and evaluated against individual devices and complete circuits fabricated in an industrial smart power SOI process. Accuracy is significantly improved with respect to the existing LDMOS models, and convergence behavior in switching and linear circuit simulations is comparable with industry standard models of this complexity.

Compact modeling of high-voltage LDMOS devices including quasi-saturation

“…Low-voltage LDMOS devices lack a thick-field-oxide drift region, and thus have a relatively short drift region; see [1]. In these devices the conductivity of the drift region is always larger than that of the channel region, so that saturation of the current is controlled by the channel region [8]. In high-voltage LDMOS devices, on the other hand, the current-voltage characteristics are affected at high gate-bias conditions; see Fig.…”

“…In the sub-circuit models [3]- [8] the internal potentials of the device are solved by the circuit-simulator, in which case no control can be executed on the convergence during circuit simulation. In the compact models [9]- [11], the internal potentials are solved by a numerical iteration procedure inside the model itself.…”

Analysis of the Back-Gate Effect on the on-State Breakdown Voltage of Smartpower SOI Devices

“…This, however, is not a problem because the multiplication factor M is an exponential function of the field [cf. (10)] which will give more credit to the larger fields.…”

“…The feasibility of this model has been proven in [10]. We have adapted and modified it to our needs.…”

“…Therefore, by neglecting the diffusion current and assuming that the surface is fully accumulated, the current under the gate oxide in the drift region can be expressed by [10] …”