MPI-LAPI: an efficient implementation of MPI for IBM RS/6000 SP systems

Abstract

The IBM RS/6000 SP system is one of the most cost-e ective commercially available high performance machines. IBM RS/6000 SP systems support the Message Passing Interface standard (MPI) and LAPI. LAPI is a low level, reliable and e cient one sided communication API library, implemented on IBM RS/6000 SP systems. This paper explains how the high performance of the LAPI library has been exploited in order to implement the MPI standard more e ciently than the existing MPI. It describes how to avoid unnecessary data copies at both the sending and receiving sides for such an implementation. The resolution of problems arising from the mismatches between the requirements of the MPI standard and the features of LAPI is discussed. As a result of this exercise, certain enhancements to LAPI are identi ed to enable an e cient implementation of MPI on LAPI. The performance of the new implementation of MPI is compared with that of the underlying LAPI itself. The latency (in polling and interrupt modes) and bandwidth of our new implementation is compared with that of the native MPI implementation on RS/6000 SP systems. The results indicate that the MPI implementation on LAPI performs comparably or better than the original MPI implementation in most cases. Improvements of up to 17:3% in polling mode latency, 35:8% in interrupt mode latency, and 20:9% in bandwidth are obtained for certain message sizes. The implementation of MPI on top of LAPI also outperforms the native MPI implementation for the NAS Parallel Benchmarks.

Implications of a PIM architectural model for MPI

“…The prototype MPI implementation that we have described in this paper is very similar to other MPI implementations on top of active message layers, such as those described in [9,16,3]. It is also similar to implementations that have been built on networks that have remote DMA (RDMA) capability, such as those described in [4,10,17].…”

Fast synchronization on shared-memory multiprocessors: An architectural approach

“…Active message are an efficient way to organize parallel applications [5,32]. An active message includes the address of a user-level handler to be executed by the receiving processor upon message arrival using the message body as the arguments.…”

Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture

“…E.g., several authors simplify OS-layers from the message passing interface to reduce the setup cost (e.g., [1]). Others move message passing primitives in hardware, ranging from dedicated instructions (e.g., [10]) to complex co-processors for accelerating message passing (e.g., [12]).…”