Implications of a PIM architectural model for MPI

Rodrigues,; Murphy, .; Kogge,; Brockman,; Brightwell,; Underwood,

doi:10.1109/clustr.2003.1253323

Cited by 7 publications

(2 citation statements)

References 17 publications

(15 reference statements)

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“…Several simulators have been developed to generate performance estimates for highperformance computing architectures. These range from high-fidelity and computationally expensive simulators for measuring performance between two nodes (Rodrigues et al, 2003;Underwood, Levenhagen, & Rodrigues, 2007) to lower-fidelity and lower-cost simulators that can estimate performance on large-scale machines. These lower-fidelity simulators use a variety of approaches to generate the application's processor and network workload including tracing, direct execution, and the use of skeleton applications.…”

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confidence: 99%

“…Our work is done in the context of a larger project to develop a parallel multi-scale simulator that permits users of the simulator to select the desired level of fidelity for each component of the machine. This larger project is an outgrowth of the Structural Simulation Toolkit (SST) (Rodrigues et al, 2003;Underwood et al, 2007) and the macro-scale components described herein will be referred to as SST/ macro to distinguish them from the existing micro-scale SST components.…”

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A Simulator for Large-Scale Parallel Computer Architectures

Adalsteinsson

Cranford

Evensky

et al. 2010

International Journal of Distributed Systems and Technologies

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Efficient design of hardware and software for large-scale parallel execution requires detailed understanding of the interactions between the application, computer, and network. The authors have developed a macro-scale simulator (SST/macro) that permits the coarse-grained study of distributed-memory applications. In the presented work, applications using the Message Passing Interface (MPI) are simulated; however, the simulator is designed to allow inclusion of other programming models. The simulator is driven from either a trace file or a skeleton application. Trace files can be either a standard format (Open Trace Format) or a more detailed custom format (DUMPI). The simulator architecture is modular, allowing it to easily be extended with additional network models, trace file formats, and more detailed processor models. This paper describes the design of the simulator, provides performance results, and presents studies showing how application performance is affected by machine characteristics.

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