Multi-gigahertz arbitrary timing generator and data pattern serializer/formatter

Keezer, D.C.; Chen, Te-Hui; Gray, C.; Choi, Hyunbong; Kim, Sungyeol; Lee, Seongkwan; Yoo, Hyuk Sang

doi:10.1109/test.2012.6401544

Cited by 3 publications

(1 citation statement)

References 7 publications

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“…Clearly some high-speed digital logic is needed within the memory-test board, and FPGAs are an obvious choice for this. Our own earlier projects utilized the Xilinx Virtex4, 5, 6, and Spartan6 series devices [11,12,13]. For this project we chose a 900-ball BGA Kintex-7 as it met all the performance requirements except for I/O count of the gigabit transceivers (we needed 64 channels, but the maximum was 32).…”

Section: Test System Strategy and Architecturementioning

confidence: 99%

An FPGA-based ATE extension module for low-cost multi-GHz memory test

Keezer

Chen

Moon

et al. 2015

2015 20th IEEE European Test Symposium (ETS)

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This paper describes an ATE extension module that enables a low-cost test system to be applied to advanced (multi-GHz) memories. The target application is for testing memories with data rates above 3.2Gbps. The test module uses state-of-the-art FPGAs for economical autonomous pattern synthesis and comparison under the high-level supervision of a low-cost "host" test platform (ATE). The FPGA logic capabilities are complemented by custom 4-channel "pin electronics" (PE) modules with I/O performance comparable to advanced ATE. The PE modules provide input/output/bidirectional signal conditioning, including amplitude, format, timing, and preemphasis, and a "shadow sampler."

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Section: Test System Strategy and Architecturementioning

confidence: 99%