Multi-level 40nm WO&lt;inf&gt;X&lt;/inf&gt; resistive memory with excellent reliability

Chien, Wei-Ming; Lee, Ming-Hsiu; Lee, Feng-Ming; Lin, Yu-Yu; Lung, Hsiang-Lan; Hsieh, Kuang-Yeu; Lu, Chih‐Yuan

doi:10.1109/iedm.2011.6131651

Cited by 36 publications

(18 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This device configuration allows for solving the sneak path problem. Recently, this behavior has also been observed in several single layer metal-oxides TaO x , HfO x and SrTiO 3 ReRAM devices with symmetrical electrode configuration [10][11][12], which is called complementary switching (CS). CS devices can be implemented into passive crossbar array without the selector device and allows for logic-in-memory applications [13,14].…”

Section: Introductionmentioning

confidence: 86%

3-bit read scheme for single layer Ta₂O₅ ReRAM

Schönhals

Waser

Menzel

et al. 2014

2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)

View full text Add to dashboard Cite

Complementary switching mechanism allows for distinguishing between different physical orientations of the conductive filament. In addition to the multilevel capability of single layer Ta 2 O 5 devices, 3-bit information can also be stored and read in a single device. In this report, we present a novel read scheme, allowing for distinguishing 8 different states only by using 4 different resistive states with the pulse measurements. Variability and cycle-to-cycle stability of the single layer Ta 2 O 5 complementary switching are also discussed in details.

show abstract

Section: Introductionmentioning

confidence: 86%

3-bit read scheme for single layer Ta₂O₅ ReRAM

Schönhals

Waser

Menzel

et al. 2014

2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS)

View full text Add to dashboard Cite

show abstract

“…Many ReRAM material systems, such as TiOx [18], HfOx [8], WOx [1], TaOx [9], CuO [16], and ZrOx [11] were reported to be capable of MLC operation. Table 5 summarizes the state-of-the-art MLC ReRAM metrics in different ReRAM technologies.…”

Section: Trade-offs In Materials Selectionmentioning

confidence: 99%

Understanding the trade-offs in multi-level cell ReRAM memory design

Niu

Muralimanohar

et al. 2013

Proceedings of the 50th Annual Design Automation Conference

115

View full text Add to dashboard Cite

Resistive Random Access Memory (ReRAM) is one of the most promising emerging memory technologies as a potential replacement for DRAM memory and/or NAND Flash. Multi-level cell (MLC) ReRAM, which can store multiple bits in a single ReRAM cell, can further improve density and reduce cost-per-bit, and therefore has recently been investigated extensively. However, the majority of the prior studies on MLC ReRAM are at the device level. The design implications for MLC ReRAM at the circuit and system levels remain to be explored. This paper aim to provide the first comprehensive investigation of the design trade-offs involved in MLC ReRAM. Our study indicates that different resistance allocation schemes, programming strategies, peripheral designs, and material selections profoundly affect the area, latency, power, and reliability of MLC ReRAM. Based on this analysis, we conduct two case studies: first we compare MLC ReRAM design against MLC phase-change memory (PCM) and multi-layer cross-point ReRAM design, and point out why multi-level ReRAM is appealing; second we further explore the design space for MLC ReRAM.

show abstract

“…As a 3D non-volatile memory technology, RRAM is attractive and much investigated in the recent decade [1][2][3][4][5]10]. For future 3D-stackable 4F 2 memory array applications, a selector device with high current density and high selectivity is required.…”

Section: Introductionmentioning

confidence: 99%

Threshold Vacuum Switch (TVS) on 3D-stackable and 4F<sup>2</sup> cross-point bipolar and unipolar resistive random access memory

Huang

Lee

et al. 2012

2012 International Electron Devices Meeting

View full text Add to dashboard Cite

A 3D stackable and bidirectional Threshold Vacuum Switching (TVS) selector using the same WO x material as the RRAM element is reported. It provides the highest reported current density of >10 8 A/cm 2 and the highest selectivity of >10 5 . Stress test at high current density indicates >10 8 cycle capability for Reset/Set operation. A mechanism based on recombination of oxygen-ions and vacancies is proposed for the observed volatile switching of TVS. Utilizing the threshold characteristics of the TVS selector, a two-step reading waveform offers potential for 3D-stackable and 4F 2 cross-point RRAM applications. I. IntroductionAs a 3D non-volatile memory technology, RRAM is attractive and much investigated in the recent decade [1-5, 10]. For future 3D-stackable 4F 2 memory array applications, a selector device with high current density and high selectivity is required. Fig. 1 [6-9] shows the current density and selectivity of various selectors reported in recent years and of this study. Driving current non-linearity is usually manipulated by back-end process changes. This paper reports a novel 3D stackable and bidirectional threshold switching with record high current density and selectivity.In this work, a CMOS compatible and 3D stackable RRAM structure with TVS selector and TMO memory is demonstrated. Contrary to reported selectors with current non-linearity manipulation, we show for the first time a novel bidirectional threshold switching. Based on threshold characteristics of TVS, suppression of sneak current by a two-step read scheme of cycle waveform offer attractive features for high-density RRAM applications.

show abstract

Multi-level 40nm WO<inf>X</inf> resistive memory with excellent reliability

Cited by 36 publications

References 5 publications

3-bit read scheme for single layer Ta₂O₅ ReRAM

3-bit read scheme for single layer Ta₂O₅ ReRAM

Understanding the trade-offs in multi-level cell ReRAM memory design

Threshold Vacuum Switch (TVS) on 3D-stackable and 4F<sup>2</sup> cross-point bipolar and unipolar resistive random access memory

Contact Info

Product

Resources

About

Multi-level 40nm WO<inf>X</inf> resistive memory with excellent reliability

Cited by 36 publications

References 5 publications

3-bit read scheme for single layer Ta2O5 ReRAM

3-bit read scheme for single layer Ta2O5 ReRAM

Understanding the trade-offs in multi-level cell ReRAM memory design

Threshold Vacuum Switch (TVS) on 3D-stackable and 4F<sup>2</sup> cross-point bipolar and unipolar resistive random access memory

Contact Info

Product

Resources

About

3-bit read scheme for single layer Ta₂O₅ ReRAM

3-bit read scheme for single layer Ta₂O₅ ReRAM