Multi-level active gate driver for SiC MOSFETs

Abstract

Active gate driving has been shown to provide reduced circuit losses and improved switching waveform quality in power electronic circuits. An integrated active gate driver with 150 ps resolution has previously been shown to offer the expected benefits in GaN-based converters. However, the use of low-voltage, high-speed transistors limits its output voltage range to 5 V, too low for many emerging SiC and GaN devices. This paper introduces a series connection of two commercially available conventional drivers and an improved 5 V, 100 ps resolution active driver. The first conventional driver lifts the gate voltage from the negative hold-off voltage to just below the gate threshold voltage, the active driver performs active high-resolution control around the gate threshold, after which the second conventional driver raises the gate voltage to reach optimal Rdson values. This driver is demonstrated on a 900-V SiC MOSFET that requires a 15 V onstate gate voltage to achieve optimum Rdson. The device is switched at 50 V/ns in a 100-kHz, non-synchronous, 1:10, 300-W boost converter, with the power device switching 600 V and 5 A. It is shown that the gate voltage can be affected on a 100 ps scale, and that meaningful changes to fast power waveforms can be achieved.

A Gate Driver Based on Variable Voltage and Resistance for Suppressing Overcurrent and Overvoltage of SiC MOSFETs

“…The third method to suppress the overvoltage and overcurrent is increasing the gate resistor for slowing the switching speed, but switching loss is greatly increased as a result [17][18][19]. Therefore, a two-stage gate driver based on a variable resistor is proposed in the literature [20]. However, a two-stage gate driver only based on a variable resistor cannot achieve lower switching loss.…”

“…However, a two-stage gate driver only based on a variable resistor cannot achieve lower switching loss. Additionally, a multilevel gate driver based on a switched voltage is proposed [20]; its principle is based on a monotonic gate voltage. The multilevel gate driver can suppress the overvoltage and overcurrent, but the switching loss increases greatly.…”

Analysis of cascaded silicon carbide MOSFETs using a single gate driver for medium voltage applications

“…Common for them is that the cost and complexity of the circuitry are high, and they require high‐speed and high‐precision analogue/digital circuitry for each stacked device [12, 22]. The faster transients of SiC increases requirements for the feedback control circuitry and timing of control signals [23]. Efforts to control the fast transients of SiC devices may cause oscillations on the gate‐source voltage, which further induces unattractive ringing of the drain‐source voltages [24, 25].…”

A Quasi-Multilevel Gate Driver for Fast Switching and Crosstalk Suppression of SiC Devices

“…On the other hand, it relaxes the gate oxide stress by setting gate-source voltage to zero before the transition to the turn-on level. In [6], the authors proposed an active MGD by connecting driver ICs in series. Similarly, a 3-level turn-off waveform is generated in [7] by driving the negative pole of one driver IC with the output of another.…”