Multi-objective kernel mapping and scheduling for morphable many-core architectures

Neves, Nuno; Neves, Rui; Horta, Nuno; Pfister, Tomas; Roma, Nuno

doi:10.1016/j.eswa.2015.10.004

Cited by 1 publication

(2 citation statements)

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“…In [118], a DSE methodology for the optimization of delay and area by an evolutionary algorithm based on pragma directives is presented. One year later, [119] described another application of NSGA-II for the optimization of delay and power with the NCBI BLASTP benchmarks [120]. Other methods use a predictive model to avoid having to resynthesize each new configuration to be explored.…”

Section: Evolutionary Algorithms Evolutionary Algorithms Have Been Good Candidates To Tackle Dse E First One Was Inmentioning

confidence: 99%

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Development of Multiobjective High-Level Synthesis for FPGAs

Bulnes

Maldonado

Trujillo

2020

Scientific Programming

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Traditionally, the High-Level Synthesis (HLS) for Field Programmable Gate Array (FPGA) devices is a methodology that transforms a behavioral description, as the timing-independent specification, to an abstraction level that is synthesizable, like the Register Transfer Level. This process can be performed under a framework that is known as Design Space Exploration (DSE), which helps to determine the best design by addressing scheduling, allocation, and binding problems, all three of which are NP-hard problems. In this manner, and due to the increased complexity of modern digital circuit designs and concerns regarding the capacity of the FPGAs, designers are proposing novel HLS techniques capable of performing automatic optimization. HLS has several conflicting metrics or objective functions, such as delay, area, power, wire length, digital noise, reliability, and security. For this reason, it is suitable to apply Multiobjective Optimization Algorithms (MOAs), which can handle the different trade-offs among the objective functions. During the last two decades, several MOAs have been applied to solve this problem. This paper introduces a comprehensive analysis of different MOAs that are suitable to perform HLS for FPGA devices. We highlight significant aspects of MOAs, namely, optimization methods, intermediate structures where the optimizations are performed, HLS techniques that are addressed, and benchmarks and performance assessments employed for experimentation. In addition, we show the analysis of how multiple objectives are optimized currently in the algorithms and which are the objective functions that are optimized. Finally, we provide insights and suggestions to contribute to the solution of major research challenges in this area.

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Section: Evolutionary Algorithms Evolutionary Algorithms Have Been Good Candidates To Tackle Dse E First One Was Inmentioning

confidence: 99%

“…It was used by learning-based methods and problem-specific heuristics. Other benchmarks of less use were the ACM/SIGDA benchmarks [174] in [7,116], the Linpack benchmark [175] in [75], the NCBI BLASTP [120] in [119], the BDTI DSP [176] in [162], and the SHOC benchmark suite [177] in [83].…”

Section: Analysis Comparisons and Main Findingsmentioning

confidence: 99%