Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition

Abstract

This paper presents a Finite State Machine (FSM) implementation method based on symbolic functional decomposition. This novel approach to multilevel logic synthesis of FSMs targets Field Programmable Gate Array (FPGA) architectures. Traditional methods consist of two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient method of implementing digital circuits. However, none of the known state encoding algorithms can be considered as a good method to be used with functional decomposition. In this paper, the concept of symbolic functional decomposition is applied to obtain a multilevel structure that is suitable for implementation in FPGA architectures. The symbolic functional decomposition does not require a separate encoding step. It accepts FSM description with symbolic states and performs decomposition, producing such a state encoding that guarantees the optimal or near-optimal solution. Keywords: Symbolic functional decomposition; FSM; FPGA. 257 Int. J. Comp. Intel. Appl. 2006.06:257-271. Downloaded from www.worldscientific.com by UNIVERSITY OF AUCKLAND LIBRARY -SERIALS UNIT on 03/15/15. For personal use only.258 M. Rawski et al.

Symbolic Functional Decomposition Algorithm for FSM Implementation

“…By using symbolic variables, the encoding of the machine's states is introduced gradually, in a way optimal for the succesive functional decomposition iterations. The preliminary results presented in [6] suggest that this approach is better than the ones based on pre-encoding the state variables and mapping an encoded, binary function to the FPGA's LUT cells. …”

“…The remaining separations are 1116, 2 16, 3 4, 3 5, 3 9, 3 11, 3 13, 3 14, 3 15, 3 19, 4 9, 4 13, 4 14, 6 For the example FSM, the incompatibility graph that has to be implemented by the 13Qv blanket is presented in Figure 4; to obtain the blocks of the 13Qv blanket, the graph has to be colored. After coloring of the graph, the /3Q blocks 1,3,6,7, 13,14,18,19 TABLE IV FINAL DECOMPOSITION OF THE FSM FROM TABLE I: A) Table Ia is presented in Table IV.…”

“…The application of this method for multi-level implementation of finite state machines in FPGA circuits was described in [6]. This method uses a description of the finite state machine that maintains a symbolic representation of the machine's states and introduces their encoding gradually, during each iteration of the decomposition process; such approach guarantees high quality of the final decomposition.…”

“…Let /3y and 3cQ, be blankets induced by the primary output sets and by next state multi-valued variable Q'. Theorem 1: Existence of the symbolic functional decomposition [6].…”

Application of Indexed Partition Calculus in Logic Synthesis of Boolean Functions for FPGAs

“…Blanket calculus proved to be very efficient in decomposition based logic synthesis of Boolean functions specified by cubes. Many ideas based on this concept can be found in literature that solve problems from field of general (functional) decomposition of combinational circuits [3], [10], [20]- [22] and sequential machines [23], pattern analysis, knowledge discovery, machine learning, decision systems, data bases, data mining etc. [24]- [26].…”