Multiobjective Optimization of FPGA-Based Medical Image Registration

Dandekar, Omkar; Plishker, William; Bhattacharyya, Shuvra S.; Shekhar, Raj

doi:10.1109/fccm.2008.50

Cited by 8 publications

(6 citation statements)

References 31 publications

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“…Moreover, our optimization framework supports multiple search algorithms and objective function models and may be extended to a wide range of other signal processing applications. A preliminary version of the work presented in this article is published in [50]. This paper represents an enhanced and more thorough version of that work.…”

Section: Discussionmentioning

confidence: 99%

Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration

Dandekar

Plishker

Bhattacharyya

et al. 2008

International Journal of Reconfigurable Computing

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In real-time signal processing, a single application often has multiple computationally intensive kernels that can benefit from acceleration using custom or reconfigurable hardware platforms, such as field-programmable gate arrays (FPGAs). For adaptive utilization of resources at run time, FPGAs with capabilities for dynamic reconfiguration are emerging. In this context, it is useful for designers to derive sets of efficient configurations that trade off application performance with fabric resources. Such sets can be maintained at run time so that the best available design tradeoff is used. Finding a single, optimized configuration is difficult, and generating a family of optimized configurations suitable for different run-time scenarios is even more challenging. We present a novel multiobjective wordlength optimization strategy developed through FPGA-based implementation of a representative computationally intensive image processing application: medical image registration. Tradeoffs between FPGA resources and implementation accuracy are explored, and Pareto-optimized wordlength configurations are systematically identified. We also compare search methods for finding Pareto-optimized design configurations and demonstrate the applicability of search based on evolutionary techniques for identifying superior multiobjective tradeoff curves. We demonstrate feasibility of this approach in the context of FPGA-based medical image registration; however, it may be adapted to a wide range of signal processing applications.

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Section: Discussionmentioning

confidence: 99%

Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration

Dandekar

Plishker

Bhattacharyya

et al. 2008

International Journal of Reconfigurable Computing

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“…The achievement of a correct registration is strictly correlated to multiple iterations of the three blocks, where the similarity metric has proven to be the most compute-intensive, working directly with all the data contained in the employed images [29]. Therefore, researchers proposed various approaches exploiting different hardware solutions [13,28] to accelerate either part or the entire algorithm [8,14]. Unfortunately, even though improvements have been done, the majority of the available solutions are closed-source and, generally, tailored to a specific scenario, highly reducing, if not completely preventing, the users from customizing them.…”

Section: Introductionmentioning

confidence: 99%

A Framework for Customizable FPGA-based Image Registration Accelerators

Conficconi

D'Arnese

Sozzo

et al. 2021

The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

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Image Registration is a highly compute-intensive optimization procedure that determines the geometric transformation to align a floating image to a reference one. Generally, the registration targets are images taken from different time instances, acquisition angles, and/or sensor types. Several methodologies are employed in the literature to address the limiting factors of this class of algorithms, among which hardware accelerators seem the most promising solution to boost performance. However, most hardware implementations are either closed-source or tailored to a specific context, limiting their application to different fields. For these reasons, we propose an open-source hardware-software framework to generate a configurable architecture for the most compute-intensive part of registration algorithms, namely the similarity metric computation. This metric is the Mutual Information, a well-known calculus from the Information Theory, used in several optimization procedures. Through different design parameters configurations, we explore several design choices of our highly-customizable architecture and validate it on multiple FPGAs. We evaluated various architectures against an optimized Matlab implementation on an Intel Xeon Gold, reaching a speedup up to 2.86×, and remarkable performance and power efficiency against other state-of-the-art approaches. CCS CONCEPTS• Hardware → Hardware accelerators; • Computer systems organization → Reconfigurable computing; • Applied computing → Health informatics.

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“…With the help of four Xilinx Virtex-4 LX200 FPGAs running at 100MHz, the software/hardware co-designed system achieves 3.5× speedup over a pure software implementation on SGI Altix 350 system. In 2008, a multi-objective optimization framework for precision and resource trade off is proposed [6]. The system uses multiple copies of image in external memory for simultaneous voxels access.…”

Section: Introductionmentioning

confidence: 99%

Reconfigurable acceleration of 3D image registration

Tsoi

Rueckert

et al. 2009

2009 5th Southern Conference on Programmable Logic (SPL)

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This paper proposes techniques for accelerating a software based image registration algorithm for 3D medical images targeting a reconfigurable hardware platform. Various methods, including dedicated fixed point arithmetic, error model based bit width analysis, architecture exploration and application-specific memory modules, are applied to address issues from the software algorithm and to maximize the performance of FPGA technology. Based on the reconfigurability of FPGA devices, the system can be extended to swap modules optimized for different parameters, and to adopt more advanced registration algorithms. We show that a single core on 412MHz XC5VLX330T FPGA can evaluate a rigid transformation of a 3D image with 16 million voxels in 35ms. With 30 cores on an FPGA, it is over 108 times faster than a multi-threaded implementation running on a 2.5GHz Intel Quad-Core Xeon platform.

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Multiobjective Optimization of FPGA-Based Medical Image Registration

Abstract: Abstract

Cited by 8 publications

References 31 publications

Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration

Multiobjective Optimization for Reconfigurable Implementation of Medical Image Registration

A Framework for Customizable FPGA-based Image Registration Accelerators

Reconfigurable acceleration of 3D image registration

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