Multiple memristor series–parallel connections with use in synaptic circuit design

Luo, Li; Hu, Xiaofang; Duan, Shukai; Dong, Zhekang; Wang, Lidan

doi:10.1049/iet-cds.2015.0357

Cited by 22 publications

(7 citation statements)

References 35 publications

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“…In general, mem-element emulators have accelerated memristive research that can be adopted by device researchers for future on-chip integration. In the past, emulators have been used to build adjustable relaxation oscillators [25][26][27], digital modulation [28], adaptive learning circuits [29], chaotic systems [30][31][32][33][34], and neuromorphic circuits [35][36][37].…”

Section: Introductionmentioning

confidence: 99%

Modeling and Dynamics Analysis of a Universal Interface for Constructing Floating Fractional Order Mem-Elements

Xie

Zheng

et al. 2021

Preprint

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Fractional-order systems generalize classical differential systems and have empirically shown to achieve fine-grain modeling of the temporal dynamics and frequency responses of certain real-world phenomena. Although the study of integer-order memory element (mem-element) emulators has persisted for several years, the study of fractional-order memory elements (FOMEs) has received little attention. To promote the study of the characteristics and applications of mem-element systems in fractional calculus (FC) and memory systems, in this paper, we propose a novel universal interface for constructing floating FOMEs. When the topological structure of the interface remains unchanged, the floating fractional-order memristor (FOMR), fractional-order memcapacitor (FOMC) and fractional-order meminductor (FOMI) emulators can be realized by using the impedance combinations of different passive elements, without any mem-element emulators and mutators. When compared with previously proposed FOMEs, the proposed fractional-order mem-element emulators based on a universal interface not only feature the characteristics of floating terminals and simpler circuit structures, but can also realize all three different types of FOMEs. To explore the dynamical relationships between the mem-elements and the fractional order, we mathematically derive and analyze the maximum and minimum possible values of memductance, memcapacitance and inverse meminductance which accounts for practical design considerations when building FO systems. The memory characteristics of FOMEs are analyzed by varying their orders and stimuli frequencies. The consistency of theoretical analysis, numerical calculation and simulation results validates the correctness of our proposed emulators.

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Section: Introductionmentioning

confidence: 99%

Modeling and Dynamics Analysis of a Universal Interface for Constructing Floating Fractional Order Mem-Elements

Xie

Zheng

et al. 2021

Preprint

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“…One of the most promising candidate for implementing stateful logic operations is memristors. Memristor has many excellent characteristics, such as non‐volatility, nanoscale size, memory function, low power consumption, variable resistance and so on [5–8]. Due to its desirable attributes, memristor provides a chance for advanced computing frameworks, which combines information processing and storage in memory [9].…”

Section: Introductionmentioning

confidence: 99%

Memristor‐based stateful logic gates for multi‐functional logic circuit

Luo

Dong

Duan

et al. 2020

IET Circuits, Devices & Systems

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“…All of these mentioned properties make it a potential candidate for implementing ANNs. So far, the existing research mainly focuses on the hardware design of the memristor-based synapse circuit and the corresponding multilayer neural network, as well as the realisation of the hardware-friendly training methodology [21][22][23][24][25][26][27][28][29]. For example, Kim proposed a memristor bridge synaptic circuit in [21,22].…”

Section: Introductionmentioning

confidence: 99%

Hybrid dual‐complementary metal–oxide–semiconductor/memristor synapse‐based neural network with its applications in image super‐resolution

Dong

Lai

et al. 2019

IET Circuits, Devices & Systems

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Biology-inspired neural computing is a potential candidate for the implementation of next-generation intelligent systems. Memristor is a passive electrical element with resistance-switching dynamics. Owing to its natural advantages of nonvolatility, nanoscale geometries, and variable conductance, memristor can effectively simulate the synaptic connecting strength between the neurones in the multilayer neural networks. This study presents a kind of memristor synapse-based multilayer neural network hardware architecture with a suitable training methodology. Specifically, a novel dual-complementary metaloxide-semiconductor/memristor synaptic circuit is presented, which is capable of performing the negative, zero, and positive synaptic weights via controlling the direction of current passing through the memristors. Then, the neurone circuit synthesised with multiple synaptic circuits and an activation unit is further designed, which can be utilised to constitute a compact multilayer neural network with fully connected configuration. Also, a hardware-friendly chip-in-the-loop training method is provided during the network training phase. For the verification purpose, the presented neural network is applied for the realisation of single image super-resolution reconstruction.

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Multiple memristor series–parallel connections with use in synaptic circuit design

Cited by 22 publications

References 35 publications

Modeling and Dynamics Analysis of a Universal Interface for Constructing Floating Fractional Order Mem-Elements

Modeling and Dynamics Analysis of a Universal Interface for Constructing Floating Fractional Order Mem-Elements

Memristor‐based stateful logic gates for multi‐functional logic circuit

Hybrid dual‐complementary metal–oxide–semiconductor/memristor synapse‐based neural network with its applications in image super‐resolution

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