Significant attention has been addressed to high-spatial resolution analysis of modern sub-100-nm electronic devices to achieve new functions and energy-efficient operations. The chapter presents a review of ongoing research on charge carrier distribution analysis in nanoscale Si devices by using scanning tunneling microscopy (STM) employing advanced operation modes: a gap-modulation method, a molecule-assisted probing method, and a dual-imaging method. The described methods rely on detection and analysis of tunneling current, which is strongly localized within an atomic dimension. Representative examples of applications to nanoscale analysis of Si device crosssections and nanowires are given. Advantages, difficulties, and limitations of the advanced STM methods are discussed in comparison with other techniques used in a field of device metrology.