Naturally selecting solutions

Manning, Timmy; Sleator, Roy D.; Walsh, Paul

doi:10.4161/bioe.23041

Cited by 32 publications

(10 citation statements)

References 73 publications

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“…[99][100][101][102][103][104][105][106][107] Indeed, this changing focus allowed me to establish links with the Department of Computing at Cork Institute of Technology (CIT). 108,109 This union produced CIT's first commercial spinout company, nSilico, which I co-founded in 2012. Combining all of the above elements, I wrote and coordinated ClouDx-i, a €1.3 million EU FP7 funded project, with CIT, nSilico and the University of Edinburgh as partners.…”

Section: In Silico Diagnosticsmentioning

confidence: 99%

Under the microscope: From pathogens to probiotics and back

Sleator¹

2015

Bioengineered

Self Cite

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Section: In Silico Diagnosticsmentioning

confidence: 99%

Under the microscope: From pathogens to probiotics and back

Sleator¹

2015

Bioengineered

Self Cite

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“…When the evaluation is completed, a selection is performed to select their shortest average. Selecting about 40% of the objects and creating the remaining 60% through other operations is efficient for navigation [35,36]. Considering the possibility that the best solutions in the group are reasonable solutions, 5% of the fittest individuals are selected as those with the shortest average latency in the group.…”

Section: Evaluation and Selectionmentioning

confidence: 99%

“…Many mutations in the next generation of topology synthesis cases can cause the solution to converge too late and unnecessarily increase computation time. Other GA studies have shown that obtaining mutation-generated cases is less than 10% of all cases [35,36]. In this study, we set this ratio to 10%.…”

Section: Mutationmentioning

confidence: 99%

Aging-Resilient Topology Synthesis of Heterogeneous Manycore Network-On-Chip Using Genetic Algorithm with Flexible Number of Routers

2019

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As semiconductor processes enter the nanoscale, system-on-chip (SoC) interconnects suffer from link aging owing to negative bias temperature instability (NBTI), hot carrier injection (HCI), and electromigration. In network-on-chip (NoC) for heterogeneous manycore systems, there is a difference in the aging speed of links depending on the location and utilization of resources. In this paper, we propose a heterogeneous manycore NoC topology synthesis that predicts the aging effect of each link and deploys routers and error correction code (ECC) logic. Aging-aware ECC logic is added to each link to achieve the same link lifetime with less area and latency than the Bose-Chaudhuri-Hocquenghem (BCH) logic. Moreover, based on the modified genetic algorithm, we search for a solution that minimizes the average latency while ensuring the link lifetime by changing the number of routers, location, and network connectivity. Simulation results demonstrate that the aging-aware topology synthesis reduces the average latency of the network by up to 26.68% compared with the aging analysis and the addition of ECC logic on the link after the topology synthesis. Furthermore, topology synthesis with aging-aware ECC logic reduces the maximum average latency by up to 39.49% compared with added BCH logic.improve NoC performance in heterogeneous manycore NoC designs. Existing schemes have applied a fixed number of routers in the chip. These methods make it possible to find a reasonable solution in NoC with a specific number of routers. However, in situations where the number of routers is not assigned, algorithms must be executed several times for different numbers of routers, which requires additional computation time.In contrast, due to the miniaturization of semiconductor processes, delay faults in communication data due to the aging of flip-flops and metal wires have become a significant concern in the SoC interconnect design [8][9][10]. In the nanoscale process, aging-induced delay faults occur mainly due to negative bias temperature instability (NBTI), hot carrier injection (HCI), and electromigration [11][12][13][14][15]. NBTI and HCI increase the threshold voltage of the transistors, and electromigration increases the resistance in metal wires, resulting in longer data transfer delay [8,9,15].Few studies have considered the aging effect in the high-level design of the on-chip interconnect, because it was treated as a low-level design problem. However, recent studies show that in the topology synthesis of heterogeneous manycore NoC, the aging process can be predicted based on the length and communication load of each link [14][15][16]. If the aging effect of each link is taken into consideration during the NoC topology synthesis, it is possible to reduce the performance degradation through the placement of interconnect modules and links. Moreover, this will aid in the recovery of aging resilience by correcting the error even if a delay fault occurs by using the error correction logic.The forward error correction, based on error cor...

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“…GAs are evolution-inspired metaheuristics that allow to optimize populations of individuals [14]. Such evolutionary approaches were successfully applied to various biological questions [12], e.g., design of synthetic networks and, in particular, design of single-circuit classifiers [26,16]. Due to the high flexibility of GAs in terms of design and parameters, the algorithm may be efficiently adapted to the distributed classifier problem.…”

Section: Introductionmentioning

confidence: 99%

Designing Distributed Cell Classifier Circuits using a Genetic Algorithm

Nowicka

Siebert

2019

Preprint

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Cell classifiers are decision-making synthetic circuits that allow in vivo cell-type classification. Their design is based on finding a relationship between differential expression of miRNAs and the cell condition. Such biological devices have shown potential to become a valuable tool in cancer treatment as a new type-specific cell targeting approach. So far, only single-circuit classifiers were designed in this context. However, reliable designs come with high complexity, making them difficult to assemble in the lab. Here, we apply so-called Distributed Classifiers (DC) consisting of simple single circuits, that decide collectively according to a threshold function. Such architecture potentially simplifies the assembly process and provides design flexibility. Here, we present a genetic algorithm that allows the design and optimization of DCs. Breast cancer case studies show that DCs perform with high accuracy on realworld data. Optimized classifiers capture biologically relevant miRNAs that are cancer-type specific. The comparison to a single-circuit classifier design approach shows that DCs perform with significantly higher accuracy than individual circuits. The algorithm is implemented as an open source tool.

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Naturally selecting solutions

Cited by 32 publications

References 73 publications

Under the microscope: From pathogens to probiotics and back

Under the microscope: From pathogens to probiotics and back

Aging-Resilient Topology Synthesis of Heterogeneous Manycore Network-On-Chip Using Genetic Algorithm with Flexible Number of Routers

Designing Distributed Cell Classifier Circuits using a Genetic Algorithm

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