NaviSoC: High-Accuracy Low-Power GNSS SoC with an Integrated Application Processor

Abstract

A dual-frequency all-in-one Global Navigation Satellite System (GNSS) receiver with a multi-core 32-bit RISC (reduced instruction set computing) application processor was integrated and manufactured as a System-on-Chip (SoC) in a 110 nm CMOS (complementary metal-oxide semiconductor) process. The GNSS RF (radio frequency) front-end with baseband navigation engine is able to receive, simultaneously, Galileo (European Global Satellite Navigation System) E1/E5ab, GPS (US Global Positioning System) L1/L1C/L5, BeiDou (Chinese Navigation Satellite System) B1/B2, GLONASS (GLObal NAvigation Satellite System of Russian Government) L1/L3/L5, QZSS (Quasi-Zenith Satellite System development by the Japanese government) L1/L5 and IRNSS (Indian Regional Navigation Satellite System) L5, as well as all SBAS (Satellite Based Augmentation System) signals. The ability of the GNSS to detect such a broad range of signals allows for high-accuracy positioning. The whole SoC (system-on-chip), which is connected to a small passive antenna, provides precise position, velocity and time or raw GNSS data for hybridization with the IMU (inertial measurement unit) without the need for an external application processor. Additionally, user application can be executed directly in the SoC. It works in the −40 to +105 °C temperature range with a 1.5 V supply. The assembled test-chip takes 100 pins in a QFN (quad-flat no-leads) package and needs only a quartz crystal for the on-chip reference clock driver and optional SAW (surface acoustic wave) filters. The radio performance for both wideband (52 MHz) channels centered at L1/E1 and L5/E5 is NF = 2.3 dB, G = 131 dB, with 121 dBc/Hz of phase noise @ 1 MHz offset from the carrier, consumes 35 mW and occupies a 4.5 mm2 silicon area. The SoC reported in the paper is the first ever dual-frequency single-chip GNSS receiver equipped with a multi-core application microcontroller integrated with embedded flash memory for the user application program.

A Survey on Low-Power GNSS

“…We hypothesise that algorithm complexity is a driving factor in the energy budget, especially in the early stages of the processing chain such as the Digital Signal Processing (DSP). Improvements in hardware technology should lead to a decrease in energy consumption, as seen in the last decade of research in this area [7]- [10]. While both hardware and software design will drive energy consumption, our review focuses on the software side.…”

Optimization of Linear Algebra Core Function Framework on Multicore Processors

“…Multi-core type design is a computer-based bionics, which uses computers for data processing to operate instead of the human brain, so as to accomplish tasks such as analysis, modeling and optimization of complex systems. At present, many companies at home and abroad have started to study and apply multi-channel development technology [3,4]. It has a strong data acquisition capability and high-speed computing speed, and it has been widely used in the military field.…”

Active Balun with Center-Tapped Inductor and Double-Balanced Gilbert Mixer for GNSS Applications

“…The balun and mixer presented below were used in a fully integrated dual-frequency (L1 and L5 bands) GNSS system on a chip (SoC) [30]. This article presents the narrowband balun and mixer implementation for the L1 band (center frequency at 1575.42 MHz ± 30 MHz).…”