Near-optimum synchronisers for DPSK modulation schemes

Jamadagni, K.S.; Sonde, B.S.

doi:10.1109/tencon.1989.176915

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4: Dpsk Demodulator and Synchronizer1

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“…DPSK demodulators used for simulation are described in [ 11, while synchronizers used are described in [6]. Various combinations of the modulator, demodulator and synchronizer are simulated to test their relative performance.…”

Section: 4: Dpsk Demodulator and Synchronizermentioning

confidence: 99%

Simulation of all-digital DPSK modems and synchronizers

Jamadagni

Sonde

Shah

Fourth IEEE Region 10 International Conference TENCON

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Bit error rate (BER), effects of synchronizer jwrfomnce on demodulator, performance of demodulator under impulsive noise, Block error rate (BKER) are some of the important aspects of a Modem. To obtain quantitative data on all these aspects by mathematical analysis is usually very diflcult. Hence, computer simulation is used to study Modems. This enables us to evaluate different circuit configurations, to understand their relative performances and to choose appropriate schemes for hardware realization of the Modem.In this paper various aspects of a computer program for simulating a DPSK Modem and the results of the simulation are presented. It is shown that the simulation is, indeed, veryjlexible and a useful tool in designing .Modems.

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Section: 4: Dpsk Demodulator and Synchronizermentioning

confidence: 99%