Negative Bias-Induced Threshold Voltage Instability in GaN-on-Si Power HEMTs

Meneghini, Matteo; Rossetto, Isabella; Bisi, Davide; Ruzzarin, Maria; Hove, M. Van; Stoffels, Steve; Wu, Tian-Li; Marcon, Denis; Decoutere, Stefaan; Meneghesso, Gaudenzio; Zanoni, Enrico

doi:10.1109/led.2016.2530693

Cited by 108 publications

(56 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…Fixed Charges variation between gate and drain account for the RON increase. These results are consistent with some other papers, even if related to recoverable effects [10].…”

Section: T-cad Modelssupporting

confidence: 94%

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

Tartarin

Lazăr

Saugnon

et al. 2017

Microelectronics Reliability

View full text Add to dashboard Cite

HAL is a multidisciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers. L'archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

show abstract

“…Fixed Charges variation between gate and drain account for the RON increase. These results are consistent with some other papers, even if related to recoverable effects [10].…”

Section: T-cad Modelssupporting

confidence: 94%

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

Tartarin

Lazăr

Saugnon

et al. 2017

Microelectronics Reliability

View full text Add to dashboard Cite

show abstract

“…During the step‐stress, the gate bias V GS was decreased from −10 V to −50 V with a step of −5 V and each step lasted 10 min (Figure (a)). Unlike the GaN HEMTs and MIS‐HEMTs showing negative V TH shifts under negative voltage stress, the E‐mode GaN MIS‐FETs showed a positive V TH shift over the entire gate biases region (Figure (b)). The absence of negative V TH shift under a wide range of negative gate bias suggests: (i) negligible hole trapping near the channel, which can be ascribed to the absence of holes under zero drain bias and negative V GS ; and (ii) low‐density interface/border traps that tend to slowly emit trapped electrons under negative V GS .…”

Section: Characterization Of Vth Instabilitymentioning

confidence: 97%

“…Thus, the V TH stability under forward gate bias is one of the critical reliability issues in the normally‐off MIS‐FETs . On the other hand, under negative bias stress, electron detrapping may result in negative V TH shifts, which will lead to the false turn‐on of MIS‐FETs. Thus, a stable threshold voltage is also desirable when the MIS‐FETs are exposed to negative gate voltages, which is a common situation when the devices are operated in realistic conditions.…”

Section: Introductionmentioning

confidence: 99%

Bias Temperature Instability of Normally‐Off GaN MIS‐FET with Low‐Pressure Chemical Vapor Deposition SiN_x Gate Dielectric

Hua

Qian

Wei

et al. 2018

Physica Status Solidi (a)

View full text Add to dashboard Cite

In this work, characterizations are conducted to investigate the threshold voltage (VTH) stability of the normally‐off GaN metal–insulator–semiconductor (MIS‐) field‐effect transistor (FET) with fully recessed gate structure and highly reliable low‐pressure chemical vapor deposition SiNx gate dielectric. We conducted bias‐temperature instability (BTI) tests under both positive and negative gate bias. We demonstrated the highly stable VTH of the high‐performance MIS‐FETs with small BTI, which benefits from the effective interfacial protection layer. More specifically, combining the BTI tests and drain current 1/f noise analysis, we present extensive investigation of the physical origins of BTI. According to the experimental evidence and analysis, we ascribe the VTH instability to the trapping/detrapping of the pre‐existing trap states located at the SiNx/GaN interface and/or in the gate dielectric.

show abstract

“…This solution guarantees an effective minimization of the gate leakage, and threshold voltages higher than one volt. The main drawbacks of this approach are the threshold voltage instability (positive (PBTI) [17], or negative (NBTI) [18]) due to the interface/border traps in the insulator, and the time-dependent dielectric breakdown (TDDB) of the thin insulator [11]. (iii) The integration, in a single package, of a cascoded pair constituted by a (normally-on) high voltage GaN-transistor and a low voltage silicon MOSFET [19].…”

Section: Introductionmentioning

confidence: 99%

Technology and Reliability of Normally-Off GaN HEMTs with p-Type Gate

et al. 2017

Self Cite

View full text Add to dashboard Cite

Abstract:GaN-based transistors with p-GaN gate are commonly accepted as promising devices for application in power converters, thanks to the positive and stable threshold voltage, the low on-resistance and the high breakdown field. This paper reviews the most recent results on the technology and reliability of these devices by presenting original data. The first part of the paper describes the technological issues related to the development of a p-GaN gate, and the most promising solutions for minimizing the gate leakage current. In the second part of the paper, we describe the most relevant mechanisms that limit the dynamic performance and the reliability of GaN-based normally-off transistors. More specifically, we discuss the following aspects: (i) the trapping effects specific for the p-GaN gate; (ii) the time-dependent breakdown of the p-GaN gate during positive gate stress and the related physics of failure; (iii) the stability of the electrical parameters during operation at high drain voltages. The results presented within this paper provide information on the current status of the performance and reliability of GaN-based E-mode transistors, and on the related technological issues.

show abstract

Negative Bias-Induced Threshold Voltage Instability in GaN-on-Si Power HEMTs

Cited by 108 publications

References 11 publications

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

Bias Temperature Instability of Normally‐Off GaN MIS‐FET with Low‐Pressure Chemical Vapor Deposition SiN_x Gate Dielectric

Technology and Reliability of Normally-Off GaN HEMTs with p-Type Gate

Contact Info

Product

Resources

About

Negative Bias-Induced Threshold Voltage Instability in GaN-on-Si Power HEMTs

Cited by 108 publications

References 11 publications

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

Bias Temperature Instability of Normally‐Off GaN MIS‐FET with Low‐Pressure Chemical Vapor Deposition SiNx Gate Dielectric

Technology and Reliability of Normally-Off GaN HEMTs with p-Type Gate

Contact Info

Product

Resources

About

Bias Temperature Instability of Normally‐Off GaN MIS‐FET with Low‐Pressure Chemical Vapor Deposition SiN_x Gate Dielectric