Negative Capacitance Double-Gate Junctionless FETs: A Charge-Based Modeling Investigation of Swing, Overdrive and Short Channel Effect

Abstract

In this paper, an analytical predictive model of the negative capacitance (NC) effect in symmetric long channel double-gate junctionless transistor is proposed based on a charge-based model. In particular, we have investigated the effect of the thickness of the ferroelectric on the I-V characteristics. Importantly, our model predicts that the negative capacitance minimizes short channel effects and enhances current overdrive, enabling both low power operation and more efficient transistor size scaling, while the effect on reducing subthreshold slope shows systematic improvement, with subthermionic subthreshold slope values at high current levels. Our predictive results in a long channel junctionless with NC show an improvement in ON current by a factor of 6 in comparison to junctionless FET. The set of equations can be used as a basis to explore how such a technology booster and its scaling will impact the main figures of merit of the device in terms of power performances and gives a clear understanding of the device physics. The validity of the analytical model is confirmed by extensive comparisons with numerical TCAD simulations in all regions of operation, from deep depletion to accumulation and from linear to saturation.

Non-Hysteretic Condition in Negative Capacitance Junctionless FETs

“…If this happens, the body factor "m" becomes lower than unity, pushing the subthreshold swing (SS) below 60 mV/dec [4]. To model this behavior, the common approach is to consider the Gibbs free energy U of a ferroelectric with respect to the total polarization P [11]. According to the Landau theory, the voltage drop across the ferroelectric V f is linked to the charge density of the ferroelectric Q (per unit area) as follows…”

“…To calculate the potential across the ferroelectric from relation (1), we need the total charge density in the channel. Explicit expressions of the total charge density in the ferroelectric for the JLFET operating either in depletion, accumulation, or hybrid modes obtain from ref [11].…”

“…On the other hand, the NCDG JLFET is simulated by a self-consistent solution of the charge-voltage characteristics of the ferroelectric obtained from Landau equation and the baseline DG JLFET obtained from TCAD. [11].…”

“…In this context and following analytical models developed in [8]- [11], we propose to investigate in details the negative capacitance in Double-Gate junctionless FETs (DG JLFETs). In our previous work [11] we studied how the ferroelectric influences the current-voltage characteristics of a DG JLFET and predicted that, although NC in the junctionless FETs does not enhance the SS in the depletion region, swing in the moderate drain currents decreases and improves the overdrive voltage.…”

Stacked Single‐Gate Silicon on Insulator 4H‐SiC Junctionless Field‐Effect Transistor with a Buried P‐Type 4H‐SiC Layer

“…[14,15] Several articles on junctionless FET (JLFET) have been presented to enhance their performance. [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33] Recently, due to its wider bandgap than silicon, silicon carbide (SiC) has been recommended for high voltage usage in JLFETs to increase the breakdown voltage by lowering the band-to-band tunneling (BTBT). [16,26,34] The electrostatic integrity (EI), which impacts the drain-induced barrier lowering (DIBL) and SCEs, indicates the efficiency of the electrical management of the channel from the use of the gate terminal.…”