NEGF analysis of InGaAs Schottky barrier double gate MOSFETs

Pal, Himadri S.; Low, Tony; Lundstrom, Mark

doi:10.1109/iedm.2008.4796843

Cited by 16 publications

(7 citation statements)

References 6 publications

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“…Over the past few years, the inherent difficulties in Si-device scaling have fueled the exploration of high carrier mobility channel materials to further improve the device performance [1][2][3][4][5][6][7][8][9][10][11][12][13][14]. In particular, among various semiconductors mixed anion InAs x Sb 1-x shows great promise in recent years as it offers extremely high electron mobility and saturation velocity [15][16][17].…”

Section: Introductionmentioning

confidence: 99%

Analog circuit performance of high mobility ultrathin-body InAsSb-on-insulator MOSFETs

Bhattacherjee¹,

Biswas

2014

Proceedings of the 2014 IEEE Students' Technology Symposium

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In this paper, we report, for the first time, device parameters related to analog circuit applications of symmetric double gate InAsSb channel n-MOSFETs. Our model is based on the carrier concentration and the Pao-Sah's current formulation considering field dependent electron mobility and interface trapped-charge-density. Accuracy of the model has been verified by comparing analytical results with the reported experimental data. The proposed model has been employed to calculate the drain current of DG MOSFETs for different gate and drain voltages and also to compute various analog performance metrics such as transconductance, output conductance, transconductance efficiency, voltage gain and cut-off frequency for a wide range of bias conditions and interface trap charge densities. Our results reveal that InAsSb devices outperform their equally sized Si counterpart for analog circuit applications.

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Section: Introductionmentioning

confidence: 99%

Analog circuit performance of high mobility ultrathin-body InAsSb-on-insulator MOSFETs

Bhattacherjee¹,

Biswas

2014

Proceedings of the 2014 IEEE Students' Technology Symposium

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“…One step forward might be the turn from silicon SB MOSFETs to III-V SB MOSFETs [7]. III-V MOSFETs with doped S/D suffer from high series resistances, which significantly degrade the ON-current I ON [7]- [9].…”

Section: Introductionmentioning

confidence: 99%

“…III-V MOSFETs with doped S/D suffer from high series resistances, which significantly degrade the ON-current I ON [7]- [9]. Investigations recommend this change regarding experimental results with improved slope and I ON /I OFF ratio performance due to III-V material properties, such as improved carrier masses and higher mobilities [10], [11].…”

Section: Introductionmentioning

confidence: 99%

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Analysis and Performance Study of III–V Schottky Barrier Double-Gate MOSFETs Using a 2-D Analytical Model

Schwarz

Kloes

2016

IEEE Trans. Electron Devices

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A comprehensive study and comparison of IV and III-V Schottky barrier (SB) double-gate MOSFETs using a universal analytical model and Synopsys TCAD Sentaurus is presented. Various impacts on the device performance have been identified, e.g., the SB height, the bandgap, the materialdependent carrier masses, and density-of-states affecting the ambipolar behavior and ON-current. The performance is analyzed with respect to the most important physical parameters and their impact on the device figure of merit. Ambipolar behavior is an important factor and must be carefully considered in the device design to aim a high I ON /I OFF ratio and comparable subthreshold slope to conventional MOSFET devices to benefit from the SB. This paper shows that the above listed parameters determine the bottleneck on the device performance. Index Terms-2-D Poisson equation, III-V MOSFET, analytical modeling, compact modeling, device modeling, doublegate (DG) MOSFET, Schottky barrier (SB), thermionic current, tunneling current. 0018-9383

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“…Recent innovations on III-V transistors include sub-100 nm gate-length, high performance InGaAs buried channel [4,5] and surface channel MOSFETs [6], sub-80 nm E-mode InGaAs/InAs HEMTs [7][8][9][10], and InSb p-channel HEMTs [11] with outstanding logic performance at short channel lengths and low supply voltages. At the same time, theoretical work has predicted the performance of III-V transistors with respect to Si at near future technology nodes with the focus on device design, bandstructure effects, source engineering, etc [12][13][14][15][16][17][18][19][20][21].…”

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confidence: 99%

Device Physics and Performance Potential of III-V Field-Effect Transistors

Liu

Pal²,

Lundstrom³

et al. 2010

Fundamentals of III-V Semiconductor MOSFETs

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The device physics and technology issues for III-V transistors are examined from a simulation perspective. To examine device physics, an InGaAs HEMT structure similar to those being explored experimentally is analyzed. The physics of this device is explored using detailed, quantum mechanical simulations based on the non-equilibrium Green's function formalism. In this chapter, we: (1) elucidate the essential physics of III-V HEMTs, (2) identify key technology challenges that need to be addressed, and (3) estimate the expected performance advantage for III-V transistors. IntroductionDriven by tremendous advances in lithography, the semiconductor industry has followed Moore's law by shrinking transistor dimensions continuously for the last 40 years. The big challenge going forward is that continued scaling of planar, silicon, CMOS transistors will be more and more difficult because of both fundamental limitations and practical considerations as the transistor dimensions approach ten nanometers. The issues at small gate lengths are many fold. First, transistor scaling increases the number of gates on a chip and the operating frequency. To prevent the chip from overheating, the power dissipation should be limited, which requires lowering the power supply voltage while maintaining the ability to deliver high oncurrents for each new generation of technology. Secondly, the drain bias decreases the energy barrier height between the source and channel in a transistor due to 2D electrostatics. Degraded short channel effects become more significant as the gate length gets shorter, and the increased off-state leakage has pushed the standby power to its practical limit. Thirdly, the accompanying scaled oxide thickness provides better gate control of the channel potential, but this inevitably increases S. Oktyabrsky, P. D. Ye (eds.), Fundamentals of III-V Semiconductor MOSFETs,

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NEGF analysis of InGaAs Schottky barrier double gate MOSFETs

Cited by 16 publications

References 6 publications

Analog circuit performance of high mobility ultrathin-body InAsSb-on-insulator MOSFETs

Analog circuit performance of high mobility ultrathin-body InAsSb-on-insulator MOSFETs

Analysis and Performance Study of III–V Schottky Barrier Double-Gate MOSFETs Using a 2-D Analytical Model

Device Physics and Performance Potential of III-V Field-Effect Transistors

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