Network Condition-Aware Communication Mechanism for Circuit-Switched Optical Networks-on-Chips

Tan, Wei; Gu, Huaxi; Yang, Yong; Fadhel, M Ghannouchi; Zhang, Bowen

doi:10.1364/jocn.8.000813

Cited by 10 publications

(3 citation statements)

References 12 publications

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“…In this condition, the bridge nodes act as the cluster head for the entire clusters . Communication between the diagonally located clusters (C0, C2) and (C1, C3) takes place through the bridge cluster via the diagonal links . To simplify the overall structure, all links are eliminated except those that are connected with the bridge node.…”

Section: Proposed Methodologymentioning

confidence: 99%

“…13 Communication between the diagonally located clusters (C0, C2) and (C1, C3) takes place through the bridge cluster via the diagonal links. 14 To simplify the overall structure, all links are eliminated except those that are connected with the bridge node. This process simplifies the routing on the chip, reduces the wiring density, and provides better communication performance.…”

Section: Scmesh Topolgymentioning

confidence: 99%

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An area‐efficient low‐power SCM topology for high performance network‐on Chip (NoC) architecture using an optimized routing design

Poovendran¹,

Sumathi²

2018

Concurrency and Computation

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Summary The incorporation of network‐on‐Chip with communication delivers a strengthening solution to the rising complexity and problems in system‐on‐chip. Here, mesh topology is shortly connected, utilizing the symmetric properties of the network, and is introduced. In addition, 4x4‐Router Architecture–Carry Select Adder (4x4‐RA‐CSLA) method is proposed to improve the function of the Router Architecture (RA) in the network. These features make the system achieve efficient architecture in terms of lower area and power for the interconnection of network scenarios. This new architecture is debugged using ModelSim with Verilog code. The experimental result shows improvement in area and power.

show abstract

Section: Proposed Methodologymentioning

confidence: 99%

Section: Scmesh Topolgymentioning

confidence: 99%

An area‐efficient low‐power SCM topology for high performance network‐on Chip (NoC) architecture using an optimized routing design

Poovendran¹,

Sumathi²

2018

Concurrency and Computation

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“…The routing algorithm is deadlock free by employing an existing switching mechanism [18]. Furthermore, the 16-node multi-ring in Fig.…”

Section: Communication Mechanismmentioning

confidence: 99%

An Optimization Algorithm to Build Low Congestion Multi-Ring Topology for Optical Network-on-Chip

Zhu

Wang

Zhou

et al. 2018

IEICE Trans. Inf. & Syst.

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SUMMARYRing-based topology is popular for optical network-onchip. However, the network congestion is serious for ring topology, especially when optical circuit-switching is employed. In this paper, we proposed an algorithm to build a low congestion multi-ring architecture for optical network-on-chip without additional wavelength or scheduling overhead. A network congestion model is established with new network congestion factor defined. An algorithm is developed to optimize the low congestion multi-ring topology. Finally, a case study is shown and the simulation results by OPNET verify the superiority over the traditional ONoC architecture.

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Fuzzy logic-based routing and wavelength assignment with traffic prediction for optical network-on-chip

Li,

Zhao,

Liu

2024

Engineering Applications of Artificial Intelligence

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Network Condition-Aware Communication Mechanism for Circuit-Switched Optical Networks-on-Chips

Cited by 10 publications

References 12 publications

An area‐efficient low‐power SCM topology for high performance network‐on Chip (NoC) architecture using an optimized routing design

An area‐efficient low‐power SCM topology for high performance network‐on Chip (NoC) architecture using an optimized routing design

An Optimization Algorithm to Build Low Congestion Multi-Ring Topology for Optical Network-on-Chip

Fuzzy logic-based routing and wavelength assignment with traffic prediction for optical network-on-chip

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