Neuron-MOS Based Schmitt Trigger with Controllable Hysteresis

Hang, Guoqiang; Liao, Yonghui; Yang, Yang; Zhang, Danyan; Hu, Xiaohui

doi:10.1109/cis.2012.52

Cited by 4 publications

(4 citation statements)

References 10 publications

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“…A novel differential Schmitt circuit with adjustable hysteresis value is proposed by Yuan [7]. Recently, some Schmitt triggers using neuron-MOS devices have been investigated [8,9]. In this paper, a new design scheme of binary Schmitt trigger with n-channel neuron-MOS transistor is proposed.…”

Section: Introductionmentioning

confidence: 98%

A new schmitt trigger with n-channel neuron-MOS transistor

Hang

Zhu

2015

2015 11th International Conference on Natural Computation (ICNC)

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A new structure of voltage-mode binary Schmitt trigger with n-channel neuron-MOS device is designed. In this presented circuit scheme, the hysteresis window of the Schmitt circuit can be shifted by adjusting the value of the external control signal, and the hysteresis voltage can be verified by choosing the different ratio of capacitive coupling coefficients. Besides, the proposed Schmitt circuit has a simpler structure, in which only one n-channel neuron-MOS transistor, a pMOS transistor and one conventional CMOS inverter are required. Using HSPICE program and TSMC 0.35μm 2-ploy 4-metal CMOS process parameters, the effectiveness of the proposed neuron-MOS-based Schmitt trigger is validated. The threshold and hysteresis voltages are measured during simulation.

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Section: Introductionmentioning

confidence: 98%

A new schmitt trigger with n-channel neuron-MOS transistor

Hang

Zhu

2015

2015 11th International Conference on Natural Computation (ICNC)

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“…The Schmitt trigger (ST) has been used in both analog and digital domains to improve the noise immunity of circuits, thanks to its programmable or hard-wired hysteresis characteristics [5][6][7][8][9][10][11]. This characteristic has been utilized in many CMOS circuit blocks including oscillators [12][13][14][15], input/output pads of integrated circuits [16,17], image sensors [18][19][20][21][22][23][24], triangular carrier-based PWM modulators [25], subthreshold SRAMs [26][27][28][29], CMOS transceivers [30][31][32][33][34], impedance-to-frequency converters [35], digital to analog converters (DACs) [36], neuron-based analog to digital converters (ADCs) [37][38][39], powerline communication systems [40], binary logic circuits (i.e., adders [41] and gates [42]), and sensors [43,44].…”

Section: Introductionmentioning

confidence: 99%

Accurate Analysis and Design of Integrated Single Input Schmitt Trigger Circuits

Elmezayen

Maghraby

et al. 2020

JLPEA

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Schmitt trigger (ST) circuits are widely used integrated circuit (IC) blocks with hysteretic input/output (I/O) characteristics. Like the I/O characteristics of a living neuron, STs reject noise and provide stability to systems that they are deployed in. Indeed, single-input/single-output (SISO) STs are likely candidates to be the core unit element in artificial neural networks (ANNs) due not only to their similar I/O characteristics but also to their low power consumption and small silicon footprints. This paper presents an accurate and detailed analysis and design of six widely used complementary metal-oxide-semiconductor (CMOS) SISO ST circuits. The hysteresis characteristics of these ST circuits were derived for hand calculations and compared to original design equations and simulation results. Simulations were carried out in a well-established, 0.35 μm/3.3 V, analog/mixed-signal CMOS process. Additionally, simulations were performed using a wide range of supplies and process variations, but only 3.3 V supply results are presented. Most of the new design equations provide better accuracy and insights, as broad assumptions of original derivations were avoided.

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“…We tune the time constant of the integrator so the switching period of the comparator is well below the period of V in but higher than the period of undesired noise components. As shown in Figure 6a, our Schmitt trigger is composed of two current-starved inverters arranged in a topology inspired by [38]. The second current-starved inverter in the cascade uses an FG pFET bias to limit the short-circuit current.…”

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confidence: 99%

“…Mainly, the ratio of C FB to the total capacitance on the FG node (C T ) controls the spacing between the low-high (V T,H ) and high-low (V T,L ) transitions, while the charge trapped on the FG (Q FG ) sets the low-high output transition level (V T,H ). We can derive compact (approximate) expressions for V T,H and V T,L by solving for the transition voltage of the first inverter in the cascade (i.e., the DC point where the output of the first inverter V p = V int ) using the square-law models for MOSFETs operating in above-threshold saturation [38]:…”

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confidence: 99%

Extrema-Triggered Conversion for Non-Stationary Signal Acquisition in Wireless Sensor Nodes

Bhattacharyya,

Hasler

2024

JLPEA

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While wireless sensor node (WSNs) have proliferated with the rise of the Internet of Things (IoT), uniformly sampled analog–digital converters (ADCs) have traditionally reigned paramount in the signal processing pipeline. The large volume of data generated by uniformly sampled ADCs while capturing most real-world signals, which are highly non-stationary and sparse in information content, considerably strains the power budget of WSNs during data transmission. Given the pressing need for intelligent sampling, this work proposes an extrema pulse generator devised to trigger ADCs at significant signal extrema, thereby curbing the volume of data points collected and transmitted, and mitigating transmission power draw. After providing a comprehensive signal-theoretic rationale, we construct and experimentally validate these circuits on a system-on-chip field-programmable analog array in a 350 nm complementary metal-oxide-semiconductor (MOS) process. Operating within a power range of 4.3–12.3 µW (contingent on the input bandwidth requirements), the extrema pulse generator has proven to be capable of effectively sampling both synthetic and natural signals, achieving significant reductions in data volume and signal reconstruction error. Using a nonideality-resilient reconstruction algorithm, that we develop in this work, experimental comparisons between extrema and uniform sampling show that extrema sampling achieves an 18-fold lower normalized root mean square reconstruction error for a quadratic chirp signal, despite requiring 5-fold fewer sample points. Similar improvements in both the reconstruction error and effective sampling rate objectives are found experimentally for an electrocardiogram signal. Using both theoretical and experimental methods, this work demonstrates the potential of extrema-triggered systems for extending Pareto frontiers in modern, resource-constrained sensing scenarios.

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Neuron-MOS Based Schmitt Trigger with Controllable Hysteresis

Cited by 4 publications

References 10 publications

A new schmitt trigger with n-channel neuron-MOS transistor

A new schmitt trigger with n-channel neuron-MOS transistor

Accurate Analysis and Design of Integrated Single Input Schmitt Trigger Circuits

Extrema-Triggered Conversion for Non-Stationary Signal Acquisition in Wireless Sensor Nodes

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