1998
DOI: 10.4028/www.scientific.net/ssp.65-66.19
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New Aspects of the Diluted Dynamic Clean Process

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Cited by 17 publications
(18 citation statements)
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“…From Eq. 6, in the immediate vicinity of zero current potential, the values of the free potential, E r , and of the corrosion current density, i corr , can be derived [10] i corr ϭ RT/F(␣ ϩ ␤) R p [11] where the polarization resistance R p is given by R p ϭ (∂E/∂i) iϭ0 .…”
Section: Discussionmentioning
confidence: 99%
See 1 more Smart Citation
“…From Eq. 6, in the immediate vicinity of zero current potential, the values of the free potential, E r , and of the corrosion current density, i corr , can be derived [10] i corr ϭ RT/F(␣ ϩ ␤) R p [11] where the polarization resistance R p is given by R p ϭ (∂E/∂i) iϭ0 .…”
Section: Discussionmentioning
confidence: 99%
“…Present objectives in the field of wet treatment are aimed at reaching economic requirements for costs of chemicals and environmental regulations. 11 In this respect, our purpose is to undertake a fundamental study of the behavior, i.e., kinetics of electrochemical corrosion and their consequences on surface roughness of silicon substrates with reactants diluted in high purity deionized water. Equilibria in HF-containing solutions were thoroughly studied for determining the rate and the mechanism of silicon oxide dissolution.…”
mentioning
confidence: 99%
“…A dynamic diluted clean based on HF was first performed to etch native or chemical oxide. For the hydrophobic approach, the surface of the wafers was then reoxidized by ozone-based chemistry as reported by Tardif et al 23 Therefore, a hydrophilic surface was obtained thanks to a thin chemical SiO 2 layer. For the hydrophobic approach, in order to minimize roughness and thus increase the attractive interactions via van der Waals forces, a surface reconstruction generated by H 2 annealing was performed on the deoxidized Si wafers.…”
Section: Resultsmentioning
confidence: 99%
“…As the requirements for device performance and reliability have become stringent in gigascale integration ͑GSI͒ silicon devices, wafer cleaning technology to perform ultraclean wafer surface is critically important. [1][2][3][4][5][6] It goes without saying that metallic contaminants on silicon surface are fatal to semiconductor device. [7][8][9][10][11] After much research on metallic contamination, the removal efficiency for all metallic impurities was summarized by the two mechanisms as follows.…”
mentioning
confidence: 99%