Abstract:EUV lithography is currently setting the pace for the semiconductor industry’s expectations on future progress towards the 3nm node and beyond. This technology also defines the upcoming challenges for equipment providers upstream and downstream of the production line among which wafer-level overlay and CD error requirements stand out most prominent. Registration errors on the mask, both local (mid-range) and global (long-range), contribute to overlay errors on the wafer. Here, we will present novel calibration… Show more
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