Ni, Pt and Yb Based Fully Silicided (FUSI) Gates for Scaled CMOS Technologies

Abstract

An overview of FUSI gates, emphasizing on Ni-based materials for applications into sub-45 nm CMOS is presented. The work function of FUSI gates was investigated, finding lower values (suitable for NMOS) for 1) gate stacks containing lanthanides (such as Yb) for SiON or HfSiON, 2) NiSi with dopants (Sb, As and P) on SiO2 or SiON and 3) Si-richer silicides (e.g. monosilicides) for HfSiON. Higher WF values (adequate for PMOS) were found for 1) Pt containing silicides on SiO2 or SiON, 2) Ni or Pt metal-rich silicides on HfSiON and 3) B doped NiSi or Al doped Ni-rich silicides on SiO2 or SiON. Several of these FUSI gates were implemented in transistors demonstrating |Vt| values down to ~0.25-0.3 V. The scalability and integration issues are discussed, demonstrating good device characteristics down to ~50 nm gatelengths for optimized process conditions. Finally, a dual WF Ni FUSI CMOS integration flow is demonstrated.