2018
DOI: 10.11591/eei.v7i2.870
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Noise and Bandwidth Consideration in Designing Op-Amp Based Transimpedance Amplifier for VLC

Abstract: In a visible light communication (VLC) system, there are many modules involved. One of the important modules is Transimpedance Amplifier (TIA) that resides in the analog front-end receiver (Rx-AFE). TIA is responsible for performing signal conversion from current signal, which is provided from the photodiode (PD) to voltage signal. It is the reason why the TIA should be operating in low noise condition and wide bandwidth of frequency. These will enable a flexible coverage of the VLC system in performing its si… Show more

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Cited by 9 publications
(6 citation statements)
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“…Both of these noise sources can really disturb the data transfer if not minimized The target of this research is to design the TIA circuit for Visible Light Communication platform. Thus, the received signal in receiver can be processed with low error and correctly.in the previous research, noise on the trans-impedance amplifier (TIA) domain has already been explained [29] but the expanation is only limited on the analytical calculus based on the article [30]. On this paper, noise profile of the same domain (i.e.…”
Section: Introductionmentioning
confidence: 91%
“…Both of these noise sources can really disturb the data transfer if not minimized The target of this research is to design the TIA circuit for Visible Light Communication platform. Thus, the received signal in receiver can be processed with low error and correctly.in the previous research, noise on the trans-impedance amplifier (TIA) domain has already been explained [29] but the expanation is only limited on the analytical calculus based on the article [30]. On this paper, noise profile of the same domain (i.e.…”
Section: Introductionmentioning
confidence: 91%
“…The proposed Δ-Σ is derived from the different and summing nodes in a loop arrangement, where delta (Δ) signifies the difference operation in the input bits and sigma (Σ) denotes the summation or accumulation, as seen in Figure 3. The output of the Δ-Σ modulator in liner models can be stated as [24]:…”
Section: Analysis Delta-sigma Frequency Synthesizer Modulator Archite...mentioning
confidence: 99%
“…A 4-bit capacitive DAC1 with unit-segment-element as the first integrator is shown in Figure 2. The DWA logic circuit [22] is used to reduce the effect of nonlinearity errors in the DAC, which is caused by the condenser mismatch between the unit elements in a multi-bit DAC. Although the noise produced by the DAC2 condenser mismatch is fed into the -DAC modulator through the 2 nd integrator's output, the non-linear noise is created in the first order by the 1 st integrator.…”
Section: Proposed δς-Dac Modulator Implementation Passive Adder Entrenchedmentioning
confidence: 99%