Non-destructive inspection of through mould vias in stacked embedded packages by micro-CT

Roth, Holger R.; Neubrand, Tobias

doi:10.1109/eptc.2011.6184511

Cited by 11 publications

(3 citation statements)

References 5 publications

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“…For silicon, the Raman penetration depth ranges up to 2 μm, again depending on the laser wavelength. Moreover, the Raman technique can be used to measure the near-surface stresses in Si around TSVs even with an oxide layer covering the wafer surface because the laser can penetrate the oxide layer with nearly 95% transparency [4][5][6][7][8][9][10][11][12][13][14][15]. In this paper, we reports our recent progress on the stress measurement by high efficiency micro-Raman microscopy.…”

Section: Introductionmentioning

confidence: 98%

Investigation of silicon stress around through silicon vias by high efficiency micro-Raman microscopy

Jing

Dai

et al. 2013

2013 14th International Conference on Electronic Packaging Technology

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Through silicon vias (TSVs) attract considerable amount of attention and activity in recent years as a main means to achieve three-dimensional (3D) integrated circuit (IC) functionality. However, the new technology poses new integration challenges as well as new reliability challenges. This paper presents the latest progress in TSV non-destructive stress testing by means of micro-Raman microscopy, a technique which is approved to be the method of choice for identifying stress on silicon surface. The principle of micro-Raman microscopy for TSV measurement is illustrated. By using commercially available micro-Raman microscopy tools, silicon stress around vias having a diameter of 30 μm and a depth of 160 μm has been visualized under optimized conditions.

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Section: Introductionmentioning

confidence: 98%

Investigation of silicon stress around through silicon vias by high efficiency micro-Raman microscopy

Jing

Dai

et al. 2013

2013 14th International Conference on Electronic Packaging Technology

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“…Previous studies have reported that initial heat treatment at 420°C for 20 min could solve the TSV protrusion [6]. It is analyzed that, during the first thermal cycling, the Cu via undergoes material transformation, such as grain growth and recrystallization, thus resulting in an open hysteresis loop.…”

Section: Introductionmentioning

confidence: 99%

Influence of Annealing Condition on TSV Pumping and Microstructure Evolution

et al. 2015

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Through silicon vias (TSVs) are regarded as one of the key enabling components to achieve three-dimensional (3D) integrated circuit (IC) functionality. In this paper, we report on the thermal mechanical assessment of Cu “pumping” (i.e. protrusion) treated at different annealing conditions. Moreover, the impact of different integration approaches on the TSV pumping behavior is also investigated. The thermo-mechanical behavior under different annealing temperatures of TSVs having a diameter of 10 µm and a depth of 100 µm has been evaluated by white light optical profiler inspection and by high-resolution micro-Raman microscopy. The protrusion can be controlled when the test temperature is lower than the annealing temperature. Higher processing temperature than annealing temperature is not recommended according to pumping and stress measurement results.

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“…TSV is a key technology that enables 3D IC integration and therefore, it enables the development of highly miniaturized, complex, next generation systems [4,5]. Just like other new technologies, TSVs still face many critical issues [6].…”

Section: Introductionmentioning

confidence: 99%

Non-destructive testing of through silicon vias by using X-ray microscopy

Jing¹,

Wang²,

Yu³

et al. 2012

2012 13th International Conference on Electronic Packaging Technology &Amp; High Density Packaging

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Through silicon vias (TSVs) attract considerable amount of attention and activity in recent years as a main means to achieve three-dimensional (3D) integrated circuit (lC) functionality. However, the new technology poses new integration challenges as well as new testing and verification challenges. This paper presents the latest progress in TSV non-destructive testing by means of X-ray microscopy, a technique which is approved to be the method of choice for identifying metallization defects in vias. The principle of X ray imaging system for TSV measurement is illustrated. By using commercially available X-ray microscopy tools, metallization defects in vias having a diameter of 30 11m and a depth of 160 11m can be visualized under optimized conditions.

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Non-destructive inspection of through mould vias in stacked embedded packages by micro-CT

Cited by 11 publications

References 5 publications

Investigation of silicon stress around through silicon vias by high efficiency micro-Raman microscopy

Investigation of silicon stress around through silicon vias by high efficiency micro-Raman microscopy

Influence of Annealing Condition on TSV Pumping and Microstructure Evolution

Non-destructive testing of through silicon vias by using X-ray microscopy

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