2020
DOI: 10.1109/tdmr.2020.2965980
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Non-Simultaneous Triggering Induced Failure of CS-MCT Under Repetitive High-Current Pulse Condition

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Cited by 4 publications
(2 citation statements)
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“…The turn-on signal delay among the 10 Gate contacts is accounted for by means of introducing a network of SPICE resistors, all of which are named as R GP , for the 10 Gate contacts. The parasitic inductance of the Gate Runner metallization consists of not only the self-inductance but also the mutual inductance, and cannot be calculated out by hand or extracted by any commercial simulators, and thus can be usually ignored when modelling the effect of layout parasitics [21][22][23][24]. Another network of resistors, all of which are marked as R AP , is introduced in order to take the parasitic resistance induced by the Anode Pad metallization into consideration.…”
Section: Tcad Simulation Setupmentioning
confidence: 99%
“…The turn-on signal delay among the 10 Gate contacts is accounted for by means of introducing a network of SPICE resistors, all of which are named as R GP , for the 10 Gate contacts. The parasitic inductance of the Gate Runner metallization consists of not only the self-inductance but also the mutual inductance, and cannot be calculated out by hand or extracted by any commercial simulators, and thus can be usually ignored when modelling the effect of layout parasitics [21][22][23][24]. Another network of resistors, all of which are marked as R AP , is introduced in order to take the parasitic resistance induced by the Anode Pad metallization into consideration.…”
Section: Tcad Simulation Setupmentioning
confidence: 99%
“…bridge foil in detonator) and inductors (e.g. motor in machine) [5]. For the purpose of generality, we focus on the case of short PDC, i.e., no loads in PDC besides the parasitic resistor and inductor as presented in Fig.1.…”
Section: Introductionmentioning
confidence: 99%