2022
DOI: 10.1109/led.2022.3166762
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Non-Volatile Flash Memory on Ge With an Oxidation-Induced Self-Assembled Charge Trapping Layer

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Cited by 4 publications
(1 citation statement)
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“…For example, the program and erase operations of flash memory induce a high voltage of 20 V in the gate and channel, respectively [2]. The high voltages of the gate and channel induce electric fields in opposite directions, and the program and erase voltages are repeatedly applied to the interface between the a-IGZO channel and the gate dielectric because the flash memory guarantees an endurance of more than 10 5 cycles [21]. Therefore, the instability of the a-IGZO channel should be investigated under positive-negative alternating gate bias stresses.…”
Section: Introductionmentioning
confidence: 99%
“…For example, the program and erase operations of flash memory induce a high voltage of 20 V in the gate and channel, respectively [2]. The high voltages of the gate and channel induce electric fields in opposite directions, and the program and erase voltages are repeatedly applied to the interface between the a-IGZO channel and the gate dielectric because the flash memory guarantees an endurance of more than 10 5 cycles [21]. Therefore, the instability of the a-IGZO channel should be investigated under positive-negative alternating gate bias stresses.…”
Section: Introductionmentioning
confidence: 99%