Non-volatile memory property of $${\text{Er}}_{2}{\text{O}}_{3}$$ Er 2 O 3 doped

Capacitive and RRAM Forming-Free Memory Behavior of Electron-Beam Deposited Ta2O5 Thin Film for Nonvolatile Memory Application

“…Further, to measure the C – V hysteresis, the voltage was varied from ±1 to ±10 V at 1 MHz frequency, as shown in Figure a, which shows the charging and discharging operation of the device during voltage sweeping from the inversion to the accumulation region and then back to the inversion region. The clockwise loop is observed in C – V hysteresis, suggesting charge transfer from the substrate side to the charge-trapping layer . Under sweeping gate voltages from ±1 to ±10 V, memory windows increase from 1.2 to 7.9 V, respectively.…”

“…However, a thin insulating layer of Ta 2 O 5 acts as an insulator which introduces additional charge storage and trapping mechanism in the device. Therefore, the hysteresis observed in the C – V measurements of Au/Ta 2 O 5 /Si is due to the charge trapping and detrapping processes occurring at the Au/Ta 2 O 5 and Ta 2 O 5 /Si interfaces …”

“…The clockwise loop is observed in C−V hysteresis, suggesting charge transfer from the substrate side to the charge-trapping layer. 36 Under sweeping gate voltages from ±1 to ±10 V, memory windows increase from 1.2 to 7.9 V, respectively. The increase in the memory window with the higher gate bias is attributed to extra charges injected into the devices.…”

“…Therefore, the hysteresis observed in the C−V measurements of Au/Ta 2 O 5 /Si is due to the charge trapping and detrapping processes occurring at the Au/Ta 2 O 5 and Ta 2 O 5 /Si interfaces. 36 The C−V and G−V measurements for various frequency were used to analyze the charging characteristic of Ta 2 O 5 TF. Figure 3a illustrates the C−V characteristics plot for various frequencies (100 kHz to 1 MHz) at a range of applied voltages from −10 to +10 V. The C−V curve shows a distinct phase of accumulation, depletion, and inversion for n-type behavior.…”