2008
DOI: 10.1002/adma.200702567
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Non‐Volatile Organic Memory Applications Enabled by In Situ Synthesis of Gold Nanoparticles in a Self‐Assembled Block Copolymer

Abstract: Block copolymers have unique associative properties that facilitate self-assembly into nanostructures that have been widely used in soft lithography, [1] templating, [2] drug delivery, [3] biomedical, [4,5] and chemical catalytic [6] applications. Of special interest is the in situ preparation of metallic or semiconducting nanoparticles in amphiphilic block copolymers. [7][8][9][10][11][12] The synthesis of nanoparticles in block copolymer micelles solves the problem of particle size control and stabilization … Show more

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Cited by 193 publications
(184 citation statements)
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“…After the fabrication of source-drain junctions and gateelectrode definition, MOSFET-structure memory devices were fabricated. The average size of gold diblock copolymer micelles to synthesize gold nanoparticles in MOS-capacitor memory devices, but P4VP core and PS corona block copolymers were not removed since PS and P4VP could be used as the potential well of gold nanoparticles in memory device structures [48]. In addition, there was a report nanoparticles was around 5 nm and the density was around 5×10 12 cm -2 .…”
Section: Mos Field-effect Transistor-type Memory Devicesmentioning
confidence: 97%
“…After the fabrication of source-drain junctions and gateelectrode definition, MOSFET-structure memory devices were fabricated. The average size of gold diblock copolymer micelles to synthesize gold nanoparticles in MOS-capacitor memory devices, but P4VP core and PS corona block copolymers were not removed since PS and P4VP could be used as the potential well of gold nanoparticles in memory device structures [48]. In addition, there was a report nanoparticles was around 5 nm and the density was around 5×10 12 cm -2 .…”
Section: Mos Field-effect Transistor-type Memory Devicesmentioning
confidence: 97%
“…Recently a 26ϫ 26 array of organic flash memory transistors based on floating gate structure was demonstrated on flexible plastic sheets, and the operating voltage was as low as 6 V. 3 Currently, different approaches have been adopted to fabricate organic nonvolatile memory devices, such as using ferroelectric polymer dielectric materials 4,5 and chargeable gate dielectric in the organic field-effect transistors ͑OFETs͒. 6 In these devices, the memory effect arises from the field effect modulation by either the spontaneous polarization that occurs in ferroelectric, or through the trapping of charges in a chargeable layer of the dielectric. 7 Usually, the charge-trapping elements in the chargeable gate dielectric are nanoparticles ͑NPs͒ of metals such as Cr, 8 Au, 6 and Ag.…”
mentioning
confidence: 99%
“…6 In these devices, the memory effect arises from the field effect modulation by either the spontaneous polarization that occurs in ferroelectric, or through the trapping of charges in a chargeable layer of the dielectric. 7 Usually, the charge-trapping elements in the chargeable gate dielectric are nanoparticles ͑NPs͒ of metals such as Cr, 8 Au, 6 and Ag. 9 Compared with ferroelectric polymer-based memory, devices using metal NPs as charge traps have an advantage that the trap density and distribution can be controlled by adjusting the density and location of the NPs during the NP formation process, by using ultrathin metallic films deposition or ion implantation techniques.…”
mentioning
confidence: 99%
“…This result indicates that the limited number of hole charges are trapped in the CuPc-PS 4 gate vias. [ 20,21,42 ] The maximum memory I ON / I OFF ratio between programmed and erased states was over 10 7 owing to the large intrinsic I ON / I OFF ratio of the CuPc-PS 4 -embedded OFET device, which led to greater ease in distinguishing the information storage levels. Moreover, the 1st (Sweep 1) and 2nd (Sweep 3) programming processes resulted in almost identical transfer curves upon applying negative pulses, which indicated that the programming/erasing cycle was suffi ciently repeatable to be categorized as a fl ash-type memory device.…”
Section: Memory Characteristicsmentioning
confidence: 99%
“…[ 14 ] Here, the preparation of these nano fl oating gate structures with specifi c sizes, concentrations, and a controlled spatial distribution inside the dielectric layer is the key to achieve high device performance. Therefore, various techniques to prepare welldefi ned nano fl oating gates using thermal evaporation, [15][16][17][18] electrostatic assembly, [ 19,20 ] or block copolymer templates [21][22][23] have been demonstrated. Furthermore, not only metal nanoparticles but also nanocarbon materials or functional organic molecules, such as fullerenes, graphenes, or phthalocyanines, have been incorporated into the dielectric layer and have proved their applicability as nano fl oating gates.…”
Section: Doi: 101002/aelm201500300mentioning
confidence: 99%