Nonvolatile organic transistor-memory devices using various thicknesses of silver nanoparticle layers

Abstract

We demonstrate the modification of the memory effect in organic memory devices by adjusting the thickness of silver nanoparticles ͑NPs͒ layer embedded into the organic semiconductor. The memory window widens with increasing Ag NPs layer thickness, a maximum window of 90 V is achieved for 5 nm Ag NPs and the on/off current ratio decreases from 10 5 to 10 when the Ag NPs layer thickness increases from 1 to 10 nm. We also compare the charge retention properties of the devices with different Ag NPs thicknesses. Our investigation presents a direct approach to optimize the performance of organic memory with the current structure. © 2010 American Institute of Physics. ͓doi:10.1063/1.3462949͔The advent of the nonvolatile flash memory has provided remarkable benefits for data storage in computers and other portable electronic devices. Due to the advantages of organic electronic devices over their inorganic counterparts such as the low fabrication costs, suitable for large area fabrication, and compatible with flexible substrates, 1,2 organic memory devices fabricated on flexible substrates have great potential for the next generation of nonvolatile flash memory. They can be further integrated with other electronic devices and form a flexible circuit. Recently a 26ϫ 26 array of organic flash memory transistors based on floating gate structure was demonstrated on flexible plastic sheets, and the operating voltage was as low as 6 V. 3 Currently, different approaches have been adopted to fabricate organic nonvolatile memory devices, such as using ferroelectric polymer dielectric materials 4,5 and chargeable gate dielectric in the organic field-effect transistors ͑OFETs͒. 6 In these devices, the memory effect arises from the field effect modulation by either the spontaneous polarization that occurs in ferroelectric, or through the trapping of charges in a chargeable layer of the dielectric. 7 Usually, the charge-trapping elements in the chargeable gate dielectric are nanoparticles ͑NPs͒ of metals such as Cr, 8 Au, 6 and Ag. 9 Compared with ferroelectric polymer-based memory, devices using metal NPs as charge traps have an advantage that the trap density and distribution can be controlled by adjusting the density and location of the NPs during the NP formation process, by using ultrathin metallic films deposition or ion implantation techniques. 10,11 Recently, we reported a different structure of transistor memory device with remarkable memory window performance by placing silver NPs in between two pentacene layers. 12 A significant advantage of the structure is that it can eliminate the extra fabrication steps for the insulator layers as in the case of floating gate transistor memory structure, making it suitable for integrating with other electronic devices on the same substrate to form a circuit. In the current work, we focused on investigating the performance variation in the pentacene OFET-based memory with different silver NP layer thickness. We also compared the memory window, on/off current ratio, and charge retention ...

Low-temperature solution-processed alumina dielectric films for low-voltage organic thin film transistors

“…The typical device structure is Si/AlO x /PS/pentacene/Ag. Here, Ag is selected as source/drain due to the low cost and good performances [33][34][35]. The pentacene is selected as organic semiconductor due to the well-known high hole mobility.…”

High performance, foldable, organic memories based on ultra-low voltage, thin film transistors

“…However, similar structures require a considerable effort in optimizing the device architecture. Other possibilities include the employment of metal nanoparticles embedded into the active channel to obtain charge trapping sites within the organic semiconductor [13][14][15]. Charge is trapped by applying a certain bias to the device in the writing step, and is de-trapped in the erasing step.…”

Thermal annealing and temperature dependences of memory effect in organic memory transistor

“…[3][4][5] Recently, we demonstrated an ONVM structure by applying floating silver nano particles (NPs) into the semiconductor layers of OTFT. 6 Such structure can maintain the relatively high mobility of the device and simplify the fabrication steps as no floating gate layer is needed.…”

“…The channel length and width of the device are 50 and 1000 lm, respectively. The detailed fabrication process has been reported elsewhere 6 and will not be repeated here. The current-voltage characteristics of the transistor memory devices were measured using an Agilent 4156C Semiconductor Parameter Analyzer.…”