Nonvolatile Logic and Ternary Content‐Addressable Memory Based on Complementary Black Phosphorus and Rhenium Disulfide Transistors

Abstract

Hardware realization of in‐memory computing for efficient data‐intensive computation is regarded as a promising paradigm beyond the Moore era. However, to realize such functions, the device structure using traditional Si complementary metal–oxide–semiconductor (CMOS) technology is complex with a large footprint. 2D material‐based heterostructures have a unique advantage to build versatile logic functions based on novel heterostructures with simplified device footprint and low power. Here, by adopting the charge‐trapping mechanism between a black phosphorus (BP) channel and a phosphorus oxide (POx) layer, a nonvolatile CMOS logic circuit based on 2D BP and rhenium disulfide (ReS2) with a high voltage gain of ≈275 is realized with a persistent hysteresis window. A Schmidt‐like flip‐flop using only two transistors is also demonstrated, with far fewer transistor numbers than the conventional silicon counterpart, which usually requires six transistors. Furthermore, four‐transistor (4T) nonvolatile ternary content‐addressable memory (nvTCAM) cells are demonstrated with far fewer transistors for parallel data search. The nvTCAM cells exhibit high resistance ratios (Rratio) up to ≈103 between match and mismatch states with zero standby power thanks to the nonvolatility of the BP transistors. This back‐end‐of‐line compatible nvTCAM shows advantages over other structures with reduced complexity and thermal budget.

Inverter and Ternary Content‐Addressable Memory Based on Carbon Nanotube Transistors Using Chemical Doping Strategy

“…The electrical hysteresis effect of p-type transistor is closely related to its nonvolatile effect. [78] It may be attributed to the continuous capture hole of carbon nanotubes under the positive voltage, which leads to the gradual decrease of carrier concentration and the smaller I ds. Under the negative voltage, the captured holes gradually dissociate from capture center, which makes the carrier concentration in the channel gradually increase, thus making the output current I ds continuously increase.…”

2D Heterostructures for Ubiquitous Electronics and Optoelectronics: Principles, Opportunities, and Challenges

“…2D heterostructures can supply possibilities for the design of new electronic memories. ,,− ,,,,, Table exhibits representative 2D heterostructure-based memories. ,− It is representative of three types of 2D heterostructure-based electronic memories: floating gate memory, ORAM, and large-scale 3D memory (Figure c). ,,, Since we thoroughly discussed optical memory circuits in ORAM in the previous section, here we mainly focus on nonoptical-based memory systems.…”

Emerging reconfigurable electronic devices based on two‐dimensional materials: A review

“…Moreover, the researchers demonstrated the device for a nonvolatile ternary logic circuit, owing to an oxidized BP trapping layer at the BP/ReS 2 interface. Based on a similar technique, ternary content addressable memories (TCAM) and Schmidt‐Triggers for analog signal processing have also been demonstrated 169 . Using a nonvolatile heterostructure as a storage unit and the artificial synapse as the weight update, the researchers carried out three‐layer artificial neural network simulations (Figure 9I), which showed a high recognition accuracy of 91.3% for hand‐written digits recognition 164 …”