As a strong candidate for future electronics, atomically thin black phosphorus (BP) has attracted great attention in recent years because of its tunable bandgap and high carrier mobility. Here, we show that the transport properties of BP device under high electric field can be improved greatly by the interface engineering of high-quality HfLaO dielectrics and transport orientation. By designing the device channels along the lower effective mass armchair direction, a record-high drive current up to 1.2 mA/μm at 300 K and 1.6 mA/μm at 20 K can be achieved in a 100-nm back-gated BP transistor, surpassing any two-dimensional semiconductor transistors reported to date. The highest hole saturation velocity of 1.5 × 107 cm/s is also achieved at room temperature. Ballistic transport shows a record-high 36 and 79% ballistic efficiency at room temperature and 20 K, respectively, which is also further verified by theoretical simulations.

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Hardware realization of in‐memory computing for efficient data‐intensive computation is regarded as a promising paradigm beyond the Moore era. However, to realize such functions, the device structure using traditional Si complementary metal–oxide–semiconductor (CMOS) technology is complex with a large footprint. 2D material‐based heterostructures have a unique advantage to build versatile logic functions based on novel heterostructures with simplified device footprint and low power. Here, by adopting the charge‐trapping mechanism between a black phosphorus (BP) channel and a phosphorus oxide (POx) layer, a nonvolatile CMOS logic circuit based on 2D BP and rhenium disulfide (ReS2) with a high voltage gain of ≈275 is realized with a persistent hysteresis window. A Schmidt‐like flip‐flop using only two transistors is also demonstrated, with far fewer transistor numbers than the conventional silicon counterpart, which usually requires six transistors. Furthermore, four‐transistor (4T) nonvolatile ternary content‐addressable memory (nvTCAM) cells are demonstrated with far fewer transistors for parallel data search. The nvTCAM cells exhibit high resistance ratios (Rratio) up to ≈103 between match and mismatch states with zero standby power thanks to the nonvolatility of the BP transistors. This back‐end‐of‐line compatible nvTCAM shows advantages over other structures with reduced complexity and thermal budget.