2011
DOI: 10.1109/tnano.2009.2039488
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Nonvolatile Memory With Ge/Si Heteronanocrystals as Floating Gate

Abstract: A p-channel memory with Ge/Si heteronanocrystals (HNCs) as the floating gate was fabricated and tested. The nanocrystals (NCs) were synthesized by low-pressure chemical vapor deposition of Si NCs followed by selective growth of Ge on top of Si. Both hole and electron storages were characterized in Ge/Si HNC memory. Fowler-Nordheim and hot carrier injection programming operations were studied. Compared to Si NC memory, enhanced memory performances were demonstrated in Ge/Si HNC memory in terms of longer retenti… Show more

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Cited by 4 publications
(2 citation statements)
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“…Extensive work on Ge/Si nanowires (NWs) has leveraged the 1D hole gas resulting from this type II alignment to investigate single Ge/Si NW field-effect transistors, Ge/Si NW Josephson Junctions, and Ge/Si NW qubits . Additionally, surface-grown Si-capped Ge QDs have been investigated for improved metal oxide semiconductor field-effect transistor (MOSFET) memory structures, photovoltaic devices, and thermoelectrics . Importantly, for these Ge/Si nanostructures, the outer Si layer provides a protective barrier against the formation of an inferior Ge oxide and may also be chemically passivated to prevent oxide formation entirely …”
Section: Introductionmentioning
confidence: 99%
“…Extensive work on Ge/Si nanowires (NWs) has leveraged the 1D hole gas resulting from this type II alignment to investigate single Ge/Si NW field-effect transistors, Ge/Si NW Josephson Junctions, and Ge/Si NW qubits . Additionally, surface-grown Si-capped Ge QDs have been investigated for improved metal oxide semiconductor field-effect transistor (MOSFET) memory structures, photovoltaic devices, and thermoelectrics . Importantly, for these Ge/Si nanostructures, the outer Si layer provides a protective barrier against the formation of an inferior Ge oxide and may also be chemically passivated to prevent oxide formation entirely …”
Section: Introductionmentioning
confidence: 99%
“…In this sense, the devices for non-volatile memories (NVM) floating gate, especially conventional flash memories type, stand out as the most demanded at the market [1]. Because of the trend towards miniaturization in order to obtain better performance, higher storage densities, faster data transfer rates and low operating voltages; scale problems have been observed in these conventional memories [2][3][4]. These are the result of the scalability limitations tunneling dielectric, located between the bulk and the floating gate, and the effects of floating gate interference among adjacent cells.…”
Section: Introductionmentioning
confidence: 99%