Nonvolatile Schottky Barrier Multibit Cell With Source-Side Injected Programming and Reverse Drain-Side Hole Erasing

Shih, Chun‐Hsing; Liang, Ji-Ting

doi:10.1109/ted.2010.2050547

Cited by 20 publications

(15 citation statements)

References 28 publications

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“…The ever-increasing demand of storage capacity in electronic devices as hard drives and non-volatile solid state memories has pushed the bit feature size to critical limits. Limitations, such as the existence of a minimum volume for a magnetic bit due to superparamagnetic fluctuations, 1,2 high spin-torque current required for the magnetization switching of spin-transfer torque random access memories, 3 micrometersized filament formation and leakage currents in resistance switching memories, [4][5][6] polycrystalline structure in tunnel metal-oxide-semiconductor charge storage cells, 7 thermal fatigue of phase-change memory materials, 8 fluctuations of storing charges in floating-gate cells, 9 scaling constrictions in the manufacturing process, 10 and so on, compromise the miniaturization of binary unit cells of electronic products. In order to overcome these restrictions and increase the storage capacity, more capable mechanisms holding information in multistate digital elements (multidigits) have been proposed.…”

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confidence: 99%

Antiferromagnetic/ferromagnetic nanostructures for multidigit storage units

et al. 2014

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The pursuit of higher densities in binary storage media is facing serious operating limitations. In order to overcome these constraints, several multistate techniques have been investigated as alternatives. Here, we report on an approach to define multistate switching memory units based on magnetic nanostructures exhibiting exchange bias. Writing and reading conditions were studied in patterned antiferromagnetic/ferromagnetic thin films. We establish the necessary and sufficient requirements for this multidigit memory concept that might open up new possibilities for the exploration and design of suitable room temperature spintronic devices. V C 2014 AIP Publishing LLC.

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confidence: 99%

Antiferromagnetic/ferromagnetic nanostructures for multidigit storage units

et al. 2014

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“…The SiNW channel with a tensile stress enhanced the electron FN tunneling from the SiNW to the SiN storage nodes and obtained a significant V th shift. [29][30][31] IV. SUMMARY In this paper, Schottky barrier source/drain electrodes in GAA silicon NW SONOS cells were evaluated.…”

Section: -4mentioning

confidence: 99%

Enhancement of programming speed on gate-all-around poly-silicon nanowire nonvolatile memory using self-aligned NiSi Schottky barrier source/drain

Chang

Chiou

2013

Journal of Applied Physics

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The programming characteristics of gate-all-around silicon-oxide-nitride-oxide silicon (SONOS) nonvolatile memories are presented using NiSi/poly-Si nanowires (SiNW) Schottky barrier (SB) heterojunctions. The non-uniform thermal stress distribution on SiNW channels due to joule heating affected the carrier transport behavior. Under a high drain voltage, impact ionization was found as a large lateral field enhances carrier velocity. As gate voltage (Vg) increased, the difference in the drain current within a range of various temperature conditions can be mitigated because a high gate field lowers the SB height of a NiSi source/SiNW/NiSi drain junction to ensure efficient hot-carrier generation. By applying the Fowler-Nordheim programming voltage to the SONOS nanowire memory, the SB height (Φn = 0.34 eV) could be reduced by image force; thus, hot electrons could be injected from SB source/drain electrodes into the SiN storage node. To compare both SiNW and Si nanocrystal SONOS devices, the SB SiNW SONOS device was characterized experimentally to propose a wider threshold-voltage window, exhibiting efficient programming characteristics.

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“…Innovation in low-voltage programming and erasing has proposed metallic Schottky barrier (SB) source/drain as an attracting approach for SONOS cell architectures [9]. The unique SB produces a strong enhancement of hot-carrier generation to have a large gate current at relatively low voltages [9]- [11].…”

Section: Introductionmentioning

confidence: 99%

“…The unique SB produces a strong enhancement of hot-carrier generation to have a large gate current at relatively low voltages [9]- [11]. Alternatively, a dopant-segregated SB structure is implemented to enhance program speed in FinFET SONOS cells [12], [13].…”

Section: Introductionmentioning

confidence: 99%

“…In SB cells, strong FN tunneling currents are produced at considerably low gate voltages. Because the SB device has a lower supplying current than a conventional device due to an appreciable SB height, enhanced speed is attributed mainly to the efficient electrical field and hot-carrier generation associated with the Schottky source/drain barrier [9]- [11].…”

Section: Introductionmentioning

confidence: 99%

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Schottky Barrier Silicon Nanowire SONOS Memory With Ultralow Programming and Erasing Voltages

Shih

Chang

Luo

et al. 2011

IEEE Electron Device Lett.

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A new Schottky barrier (SB) nonvolatile nanowire memory is reported experimentally with efficient low-voltage programming and erasing. By applying an SB source/drain to enhance the electrical field in the silicon gate-all-around nanowire, the nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory can operate at gate voltages of 5 to 7 V for programming and −7 to −9 V for erasing through Fowler-Nordheim tunneling. The larger the gate voltage is, the faster the programming/erasing speed and the wider the threshold-voltage shift are attained. Importantly, the SB nanowire SONOS cells exhibit superior 100-K cycling endurance and high-temperature retention without any damages from metallic silicidation process or field-enhanced tunneling.Index Terms-Gate-all-around nanowire, Schottky barrier (SB), silicon-oxide-nitride-oxide-silicon (SONOS) memory.

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Nonvolatile Schottky Barrier Multibit Cell With Source-Side Injected Programming and Reverse Drain-Side Hole Erasing

Cited by 20 publications

References 28 publications

Antiferromagnetic/ferromagnetic nanostructures for multidigit storage units

Antiferromagnetic/ferromagnetic nanostructures for multidigit storage units

Enhancement of programming speed on gate-all-around poly-silicon nanowire nonvolatile memory using self-aligned NiSi Schottky barrier source/drain

Schottky Barrier Silicon Nanowire SONOS Memory With Ultralow Programming and Erasing Voltages

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