Normally-off 4H-SiC trench-gate MOSFETs with high mobility

Jian, Wu; Hu, Jun; Zhao, J.H.; Wang, X.; Li, X.; Fursin, L.; Burke, T.

doi:10.1016/j.sse.2008.01.019

Cited by 8 publications

(3 citation statements)

References 13 publications

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“…In contrast to silicon technology, hydrogen annealing has not been shown to reduce D IT in SiC devices, and current research suggests either the growth of extremely thin oxide layers grown at very high temperatures [4] or nitridation (nitrous oxide annealing) [5] results in an enhancement in carrier mobility, related to the reduction in D IT [6]. Additionally, the high concentration of trap states at the SiC/SiO 2 interface is linked to the bias temperature instability observed in SiC MOSFETs owing to thermal detrapping of electrons at high temperatures [7,8,9].…”

Section: Introductionmentioning

confidence: 99%

Positive flatband voltage shift in phosphorus doped SiO₂/N-type 4H-SiC MOS capacitors under high field electron injection

Idris

Weng

Peters

et al. 2019

J. Phys. D: Appl. Phys.

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The effect of phosphorus inclusion on different bias stress at high electric field on phosphorus doped SiO 2 is investigated by electrical measurements of SiC MOS capacitors. 1 MHz C − V measurements with (1) different bias hold time (up to 999 s at room and high temperature of 250 • C), (2) different applied gate voltage (± 10, 20 and 30 V without stress time) and (3) different bias hold time at high voltage (± 30 V) were taken to observe the evolution of flatband voltage, effective oxide charge density and interface state density. In this investigation, the characteristics were measured in both sweep directions and compared to those obtained from undoped SiO 2 samples. At 250 • C, the flatband voltage of phosphorus-doped SiO 2 samples shows a significant shift to the positive with increasing bias hold time. Similar trends are observed with the characteristics obtained at room temperature, but the shifts are less significant. Both undoped and phosphorus-doped samples show positive flatband shift when a higher bias was applied for longer hold times, but the latter demonstrated more significant changes. We conclude that the phosphorus ions increase the instability of the electrical characteristics related to the generation of mobile charges in the SiO 2 , resulting in the injection of electrons from the semiconductor to the oxide. Therefore, the accumulated negative charge in phosphorus-doped SiO 2 resulting from the injection of electrons, which is enhanced by the mobile charge, is responsible for the enhanced positive shift in C − V and I − V characteristics.

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Section: Introductionmentioning

confidence: 99%

Positive flatband voltage shift in phosphorus doped SiO₂/N-type 4H-SiC MOS capacitors under high field electron injection

Idris

Weng

Peters

et al. 2019

J. Phys. D: Appl. Phys.

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“…chemical vapour deposition (CVD), physical vapour deposition (PVD) or atomic layer deposition (ALD). The good quality oxide on SiC surface is achievable only by application of complex oxidation process at temperature above 1150°C [4]. The oxide growth rate is determined by oxygen diffusion through already existing oxide in the direction of SiO 2 /Si interface.…”

Section: Introductionmentioning

confidence: 99%

Oxidation Process of SiC by RTP Technique

Kwietniewski

Gołaszewska

Piotrowski

et al. 2009

MSF

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The kinetics of 4H-SiC thermal oxidation by RTP technique and the properties of thin thermal oxide was reported. The thickness of the thermal oxide was determined by spectroscopic ellipsometry and confirmed by electrical measurements. The conductance method was applied to analyse the surface states parameters. The lifetime, density and cross-section of the surface traps were extracted for as-fabricated MOS capacitors and after thermal annealing processes.

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“…Epitaxial channel MOSFETs have been proposed as one possible way to avoid the problem of low inversion layers in traditional MOSFETs. [4,5] In such a device, the conduction of current consists of the majority carriers in a physical channel, which have much higher carrier mobility, in comparison with the minority carriers in an inversion layer. In addition, no implantation and high-temperature annealing is performed.…”

Section: Introductionmentioning

confidence: 99%

Study of a 4H–SiC epitaxial n-channel MOSFET

Tang¹,

Zhang²,

Zhang³

2010

Chinese Phys. B

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Epitaxial channel metal-oxide semiconductor field-effect transistors (MOSFETs) have been proposed as one possible way to avoid the problem of low inversion layers in traditional MOSFETs. This paper presents an equation of maximum depletion width modified which is more accurate than the original equation. A 4H-SiC epitaxial n-channel MOSFET using two-dimensional simulator ISE is simulated. Optimized structure would be realized based on the simulated results for increasing channel mobility.

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Normally-off 4H-SiC trench-gate MOSFETs with high mobility

Cited by 8 publications

References 13 publications

Positive flatband voltage shift in phosphorus doped SiO₂/N-type 4H-SiC MOS capacitors under high field electron injection

Positive flatband voltage shift in phosphorus doped SiO₂/N-type 4H-SiC MOS capacitors under high field electron injection

Oxidation Process of SiC by RTP Technique

Study of a 4H–SiC epitaxial n-channel MOSFET

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Normally-off 4H-SiC trench-gate MOSFETs with high mobility

Cited by 8 publications

References 13 publications

Positive flatband voltage shift in phosphorus doped SiO2/N-type 4H-SiC MOS capacitors under high field electron injection

Positive flatband voltage shift in phosphorus doped SiO2/N-type 4H-SiC MOS capacitors under high field electron injection

Oxidation Process of SiC by RTP Technique

Study of a 4H–SiC epitaxial n-channel MOSFET

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Product

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Positive flatband voltage shift in phosphorus doped SiO₂/N-type 4H-SiC MOS capacitors under high field electron injection

Positive flatband voltage shift in phosphorus doped SiO₂/N-type 4H-SiC MOS capacitors under high field electron injection